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RT54SX16-1CG256B Datasheet(PDF) 6 Page - Actel Corporation |
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RT54SX16-1CG256B Datasheet(HTML) 6 Page - Actel Corporation |
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6 / 46 page  SX Family FPGAs RadTolerant and HiRel 1- 2 v2.1 Disclaimer All radiation performance information is provided for information purposes only and is not guaranteed. The total dose effects are lot-dependent, and Actel does not guarantee that future devices will continue to exhibit similar radiation characteristics. In addition, actual performance can vary widely due to a variety of factors, including but not limited to, characteristics of the orbit, radiation environment, proximity to satellite exterior, amount of inherent shielding from other sources within the satellite, and actual bare die variations. For these reasons, Actel does not guarantee any level of radiation survivability, and it is solely the responsibility of the customer to determine whether the device will meet the requirements of the specific design. SX Family Architecture The SX family architecture was designed to satisfy next- generation performance and integration requirements for production-volume designs in a broad range of applications. Programmable Interconnect Element Actel’s SX family provides much more efficient use of silicon by locating the routing interconnect resources between the Metal 2 (M2) and Metal 3 (M3) layers (Figure 1-1). This completely eliminates the channels of routing and interconnect resources between logic modules (as implemented on SRAM FPGAs and previous generations of antifuse FPGAs), and enables the entire floor of the device to be spanned with an uninterrupted grid of logic modules. Interconnection between these logic modules is achieved using Actel’s patented metal-to-metal programmable antifuse interconnect elements, which are embedded between the M2 and M3 layers. The antifuses are normally open circuit and, when programmed, form a permanent low-impedance connection. The extremely small size of these interconnect elements gives the SX family abundant routing resources and provides excellent protection against design pirating. Reverse engineering is virtually impossible, because it is extremely difficult to distinguish between programmed and unprogrammed antifuses, and there is no configuration bitstream to intercept. Additionally, the interconnects (i.e., the antifuses and metal tracks) have lower capacitance and lower resistance than any other device of similar capacity, leading to the fastest signal propagation in the industry. Figure 1-1 • SX Family Interconnect Elements Silicon Substrate Tungsten Plug Contact Metal 1 Metal 2 Metal 3 Routing Tracks Amorphous Silicon/ Dielectric Antifuse Tungsten Plug Via |
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