Radiation-Hardened FPGAs

v3.1

1-7

Package Thermal Characteristics

The device junction to case thermal characteristics is

θ

and the junction to ambient air characteristics is

θ

thermal

characteristics

for

θ

ja

are

listed

with

two different air flow rates, as shown in Table 1-3.

Maximum junction temperature is 150°C.

A sample calculation of the maximum power dissipation

for an 84-pin ceramic quad flat pack at commercial

temperature is shown in EQ 1-2.

EQ 1-2

Power Dissipation

General Power Equation

EQ 1-3

where

outputs are changing.

switching.

N equals the number of outputs driving TTL loads to

M equals the number of outputs driving TTL loads to

Accurate values for N and M are difficult to determine

because they depend on the family type, design details,

and on the system I/O. The power can be divided into

two components: static and active.

Static Power Components

Actel FPGAs have small static power components that

result in lower power dissipation than PALs or PLDs. By

integrating multiple PALs/PLDs into one FPGA, an even

greater reduction in board-level power dissipation can

be achieved.

The power due to standby current is typically a small

component of the overall power. Standby power is

calculated below for military, worst case conditions.

Power

25 mA 5.5 V

138 mW (max)

1 mA

5.5 V

5.5 mW (typ)

Active Power Components

Power dissipation in CMOS devices is usually dominated

by

the

active

(dynamic)

power

dissipation.

This

component is frequency-dependent and a function of

the logic and the external I/O. Active power dissipation

results from charging internal chip capacitances of the

interconnect, unprogrammed antifuses, module inputs,

and module outputs, plus external capacitance due to PC

board traces and load device inputs. An additional

component of the active power dissipation is the

totempole current in CMOS transistor pairs. The net

effect can be associated with an equivalent capacitance

that can be combined with frequency and voltage to

represent active power dissipation.

The power dissipated by a CMOS circuit can be expressed

by EQ 1-4:

EQ 1-4

Table 1-3 • Thermal Characteristics

Package Type

Pin Count

θ

jc

θ

ja

Units

Still Air

1.0 m/s

200 ft. / min.

2.5 m/s

500 ft. / min.

Ceramic Quad Flat Pack

84

2.0

40.0

33.0

30.0

°C/W

Ceramic Quad Flat Pack

172

2.0

28.0

23.1

21.0

°C/W

Note:

θ

Max. Junction Temperature

°C

() Max. Commercial Temperature °C

()

–

θ

--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

150

°C70°C

–

40°C/W

------------------------------------

2.0 W

==