Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.COM

X  

M1AFS250-FGG256ES Datasheet(PDF) 10 Page - Actel Corporation

Part # M1AFS250-FGG256ES
Description  Actel Fusion Mixed-Signal FPGAs
Download  318 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  ACTEL [Actel Corporation]
Direct Link  http://www.actel.com
Logo ACTEL - Actel Corporation

M1AFS250-FGG256ES Datasheet(HTML) 10 Page - Actel Corporation

Back Button M1AFS250-FGG256ES Datasheet HTML 6Page - Actel Corporation M1AFS250-FGG256ES Datasheet HTML 7Page - Actel Corporation M1AFS250-FGG256ES Datasheet HTML 8Page - Actel Corporation M1AFS250-FGG256ES Datasheet HTML 9Page - Actel Corporation M1AFS250-FGG256ES Datasheet HTML 10Page - Actel Corporation M1AFS250-FGG256ES Datasheet HTML 11Page - Actel Corporation M1AFS250-FGG256ES Datasheet HTML 12Page - Actel Corporation M1AFS250-FGG256ES Datasheet HTML 13Page - Actel Corporation M1AFS250-FGG256ES Datasheet HTML 14Page - Actel Corporation Next Button
Zoom Inzoom in Zoom Outzoom out
 10 / 318 page
background image
Fusion Device Family Overview
1- 6
Prel i minary v1 .7
flash operation without wait states. The memory block is organized in pages and sectors. Each
page has 128 bytes, with 33 pages comprising one sector and 64 sectors per block. The flash block
can support multiple partitions. The only constraint on size is that partition boundaries must
coincide with page boundaries. The flexibility and granularity enable many use models and allow
added granularity in programming updates.
Fusion devices support two methods of external access to the flash memory blocks. The first
method is a serial interface that features a built-in JTAG-compliant port, which allows in-system
programmability during user or monitor/test modes. This serial interface supports programming of
an AES-encrypted stream. Secure data can be passed through the JTAG interface, decrypted, and
then programmed in the flash block. The second method is a soft parallel interface.
FPGA logic or an on-chip soft microprocessor can access flash memory through the parallel
interface. Since the flash parallel interface is implemented in the FPGA fabric, it can potentially be
customized to meet special user requirements. For more information, refer to the CoreCFI
Handbook. The flash memory parallel interface provides configurable byte-wide (×8), word-wide
(×16), or dual-word-wide (×32) data port options. Through the programmable flash parallel
interface, the on-chip and off-chip memories can be cascaded for wider or deeper configurations.
The flash memory has built-in security. The user can configure either the entire flash block or the
small blocks to prevent unintentional or intrusive attempts to change or destroy the storage
contents. Each on-chip flash memory block has a dedicated controller, enabling each block to
operate independently.
The flash block logic consists of the following sub-blocks:
Flash block – Contains all stored data. The flash block contains 64 sectors and each sector
contains 33 pages of data.
Page Buffer – Contains the contents of the current page being modified. A page contains 8
blocks of data.
Block Buffer – Contains the contents of the last block accessed. A block contains 128 data
bits.
ECC Logic – The flash memory stores error correction information with each block to
perform single-bit error correction and double-bit error detection on all data blocks.
User Nonvolatile FlashROM
In addition to the flash blocks, Actel Fusion devices have 1 kbit of user-accessible, nonvolatile
FlashROM on-chip. The FlashROM is organized as 8×128-bit pages. The FlashROM can be used in
diverse system applications:
Internet protocol addressing (wireless or fixed)
System calibration settings
Device serialization and/or inventory control
Subscription-based business models (for example, set-top boxes)
Secure key storage for secure communications algorithms
Asset management/tracking
Date stamping
Version management
The FlashROM is written using the standard IEEE 1532 JTAG programming interface. Pages can be
individually programmed (erased and written). On-chip AES decryption can be used selectively over
public networks to securely load data such as security keys stored in the FlashROM for a user
design.
The FlashROM can be programmed (erased and written) via the JTAG programming interface, and
its contents can be read back either through the JTAG programming interface or via direct FPGA
core addressing.
The FlashPoint tool in the Actel Fusion development software solutions, Libero IDE and Designer,
has extensive support for flash memory blocks and FlashROM. One such feature is auto-generation
of sequential programming files for applications requiring a unique serial number in each part.
Another feature allows the inclusion of static data for system version control. Data for the
FlashROM can be generated quickly and easily using the Actel Libero IDE and Designer software


Similar Part No. - M1AFS250-FGG256ES

ManufacturerPart #DatasheetDescription
logo
Microsemi Corporation
M1AFS250 MICROSEMI-M1AFS250 Datasheet
17Mb / 334P
   Fusion Family of Mixed Signal FPGAs
M1AFS250 MICROSEMI-M1AFS250 Datasheet
1Mb / 27P
   Terrestrial FPGA and SoC Product Catalog
M1AFS250M1AFS600-1FG256 MICROSEMI-M1AFS250M1AFS600-1FG256 Datasheet
18Mb / 334P
   Fusion Family of Mixed Signal FPGAs
M1AFS250M1AFS600-1FG256I MICROSEMI-M1AFS250M1AFS600-1FG256I Datasheet
18Mb / 334P
   Fusion Family of Mixed Signal FPGAs
M1AFS250M1AFS600-1FG256Y MICROSEMI-M1AFS250M1AFS600-1FG256Y Datasheet
18Mb / 334P
   Fusion Family of Mixed Signal FPGAs
More results

Similar Description - M1AFS250-FGG256ES

ManufacturerPart #DatasheetDescription
logo
Actel Corporation
U1AFS600-FGG256I ACTEL-U1AFS600-FGG256I Datasheet
8Mb / 17P
   Actel Fusion Mixed-Signal FPGA
logo
Microsemi Corporation
M1AFS600-PQ208 MICROSEMI-M1AFS600-PQ208 Datasheet
18Mb / 334P
   Fusion Family of Mixed Signal FPGAs
AFS600-FGG484 MICROSEMI-AFS600-FGG484 Datasheet
18Mb / 334P
   Fusion Family of Mixed Signal FPGAs
AFS1500-FGG484 MICROSEMI-AFS1500-FGG484 Datasheet
18Mb / 334P
   Fusion Family of Mixed Signal FPGAs
AFS090 MICROSEMI-AFS090 Datasheet
17Mb / 334P
   Fusion Family of Mixed Signal FPGAs
logo
Texas Instruments
MSP430F11X TI-MSP430F11X Datasheet
473Kb / 29P
[Old version datasheet]   MIXED SIGNAL MICROCONTROLLER
MSP430X31X TI-MSP430X31X Datasheet
399Kb / 30P
[Old version datasheet]   MIXED SIGNAL MICROCONTROLLERS
MSP430F249-EP TI-MSP430F249-EP Datasheet
1Mb / 81P
[Old version datasheet]   MIXED SIGNAL MICROCONTROLLER
MSP430F543X TI-MSP430F543X_11 Datasheet
981Kb / 99P
[Old version datasheet]   MIXED SIGNAL MICROCONTROLLER
MSP430FE42X TI-MSP430FE42X_10 Datasheet
975Kb / 51P
[Old version datasheet]   MIXED SIGNAL MICROCONTROLLER
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL




Privacy Policy
ALLDATASHEET.COM
Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com