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LT3781IG Datasheet(PDF) 7 Page - Linear Technology |
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LT3781IG Datasheet(HTML) 7 Page - Linear Technology |
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7 / 20 page  7 LT3781 3781f PI FU CTIO S The LT3781 oscillator operates by monitoring the voltage on CFSET as it is charged via RFSET. When the voltage on the FSET pin reaches 2.5V, the oscillator rapidly discharges the capacitor with an average current of about 0.8mA. Once the voltage on the pin is reduced to 1.5V, the pin becomes high-impedance and the charging cycle repeats. The oscillator operates at twice the switching frequency of the controller. Oscillator frequency fOSC can be approximated by the relation: fC R R OSC FSET FSET FSET ≅+ + + 05 10 3 810 2 64 1 1 .• • –– – – SYNC (Pin 7): Oscillator Synchronization Input Pin with TTL-Level Compatible Input. The SYNC input signal (at the desired synchronized operating frequency) controls both the internal oscillator (running at twice the SYNC fre- quency) and the output switch phase. If synchronization function is not desired, this pin may be floated or shorted to ground. The LT3781 internal oscillator drives a toggle flip-flop that assures a ≤50% duty-cycle condition during oscillator free-run. The oscillator, therefore, runs at twice the oper- ating frequency of the controller. The SYNC input decoder incorporates a frequency doubling circuit for oscillator synchronization, resetting the internal oscillator on both the rising and falling edges of the input signal. The SYNC input decoder also differentiates transition phase and forces the toggle flip-flop to phase-lock with the SYNC input. A transition to logic high on the SYNC input signal corresponds to the initiation of a new switching cycle (primary switches turning on pending current con- trol) and a transition to logic low forces a primary switch off state. As such, the maximum operating duty cycle is equal to the duty cycle of the SYNC signal. The SYNC input can therefore be used to reduce the maximum duty cycle of the controller by reducing the duty cycle of the SYNC input. SS (Pin 8): Soft-Start. Connect a capacitor (CSS) from this pin to ground. The output voltage of the LT3781 error amplifier corre- sponds to the peak current sense amplifier output de- tected before resetting the switch outputs. The soft-start circuit forces the error amplifier output to a zero sense current for start-up. A 10 µA current is forced from this pin onto an external capacitor. As the SS pin voltage ramps up, so does the LT3781 internally sensed current limit. This effectively forces the internal current limit to ramp from zero, allowing overall converter current to slowly increase until normal output regulation is achieved. This function reduces output overshoot on converter start-up. The soft- start functions incorporate a 1VBE “dead zone” such that a zero-current condition is maintained on the VC pin until the SS pin rises to 1VBE above ground. The SS pin voltage is reset to start-up condition during shutdown, undervoltage lockout, and overvoltage or overcurrent events, yielding a graceful converter output recovery from these events. VFB (Pin 9): Error Amplifier Inverting Input. Typically connected to a resistor divider from the output and com- pensation components to the VC pin. The VFB pin is the converter output voltage feedback node. Input bias current of ~50nA forces pin high in the event of an open feedback path condition. The error amplifier is internally referenced to 1.25V. Values for the VOUT to VFB feedback resistor (RFB1) and the VFB to ground resistor (RFB2) can be calculated to program converter output voltage (VOUT) via the following relation: VOUT = 1.25 • (RFB1 + RFB2)/RFB2 VC (Pin 10): Error Amplifier Output. The LT3781 error amplifier is a low impedance output inverting gain stage. The amplifier has ample current source capability to allow easy integration of isolation optocouplers that require bias currents up to 10mA. External DC loading of the VC pin reduces the external current sourcing capacity of the 5VREF pin by the same amount as the load on the VC pin. |
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