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LT3517IFE-TRPBF Datasheet(PDF) 8 Page - Linear Technology |
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LT3517IFE-TRPBF Datasheet(HTML) 8 Page - Linear Technology |
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8 / 20 page  LT3517 8 3517fa OPERATION The LT3517 is a constant frequency, current mode regula- tor with an internal power switch. Operation can be best understood by referring to the Block Diagram in Figure 1. At the start of each oscillator cycle, the SR latch is set, which turns on the Q1 power switch. A voltage proportional to the switch current is added to a stabilizing ramp and the resulting sum is fed into the positive terminal of the PWM comparator, A4. When this voltage exceeds the level at the negative input of A4, the SR latch is reset, turning off the power switch. The level at the negative input of A4 is set by the error amplifier A3. A3 has two inputs, one from the voltage feedback loop and the other one from the current loop. Whichever feedback input is lower takes precedence, and forces the converter into either constant-current or constant-voltage mode. The LT3517 is designed to transi- tion cleanly between these two modes of operation. The current sense amplifier senses the voltage across RSENSE and provides a pre-gain to amplifier A1. The output of A1 is simply an amplified version of the difference between the voltage across RSENSE and the lower of VCTRL/10 or 100mV. In this manner, the error amplifier sets the correct peak switch current level to regulate the current through RSENSE. If the error amplifier’s output increases, more current is delivered to the output; if it decreases, less current is delivered. The current regulated in RSENSE can be adjusted by changing the input voltage VCTRL. The current sense amplifier provides rail-to-rail current sense operation. The FB voltage loop is implemented by the amplifier A2. When the voltage loop dominates, the error amplifier and the amplifier A2 regulate the FB pin to 1.01V (constant-voltage mode). Dimming of the LED array is accomplished by pulsing the LED current using the PWM pin. When the PWM pin is low, switching is disabled and the error amplifier is turned off so that it does not drive the VC pin. Also, all internal loads on the VC pin are disabled so that the charge state of the VC pin will be saved on the external compensation capacitor. This feature reduces transient recovery time. When the PWM input again transitions high, the demand current for the switch returns to the value just before PWM last transitioned low. To further reduce transient recovery time, an external PMOS is used to disconnect the LED array current loop when PWM is low, stopping CFILT from discharging. APPLICATIONS INFORMATION Dimming Control There are two methods to control the current source for dimming using the LT3517. The first method uses the PWM pin to modulate the current source between zero and full current to achieve a precisely programmed aver- age current. To make this method of current control more accurate, the switch demand current is stored on the VC node during the quiescent phase. This feature minimizes recovery time when the PWM signal goes high. To further improve the recovery time, a disconnect switch is used in the LED current path to prevent the output capacitor from discharging in the PWM signal low phase. The minimum PWM on or off time will depend on the choice of operating frequency through RT input pin or SYNC pin. When using the SYNC function, the SYNC and PWM signals must have the aligned rising edges to achieve the optimized high PWM dimming ratio. For best current accuracy, the minimum PWM low or high time should be at least four switching cycles (2μs for fSW = 2MHz). Maximum PWM period is determined by the system and is unlikely to be longer than 12ms. The maximum PWM dimming ratio (PWMRATIO)can be calculated from the maximum PWM period (tMAX) and the minimum PWM pulse width (tMIN) as follows: PWM t t RATIO MAX MIN = (1) Example: tMAX = 10ms, tMIN = 2μs (fSW = 2MHz) PWMRATIO = 10ms/2μs = 5000:1 The second method of dimming control uses the CTRL pin to linearly adjust the current sense threshold during the PWM high state. When the CTRL pin voltage is less |
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