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TC7126CPL Datasheet(PDF) 5 Page - TelCom Semiconductor, Inc |
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TC7126CPL Datasheet(HTML) 5 Page - TelCom Semiconductor, Inc |
5 / 13 page 3-221 TELCOM SEMICONDUCTOR, INC. 7 6 5 4 3 1 2 8 3-1/2 DIGIT ANALOG-TO-DIGITAL CONVERTERS TC7126 TC7126A PIN DESCRIPTION (Cont.) 40-Pin PDIP Pin Number Normal (Reverse) Name Description 34 (7) C + REF A 0.1 µF capacitor is used in most applications. If a large common-mode voltage exists (for example, the VIN– pin is not at analog common), and a 200 mV scale is used, a 1 µF capacitor is recommended and will hold the roll-over error to 0.5 count. 35 (6) V – REF See pin 36. (5) V + REF The analog input required to generate a full-scale output (1999 counts). Place 100 mV between pins 35 and 36 for 199.9 mV full scale. Place 1V between pins 35 and 36 for 2V full scale. See paragraph on reference voltage. 36 (4) TEST Lamp test. When pulled HIGH (to V+), all segments will be turned ON and the display should read –1888. It may also be used as a negative supply for exter- nally-generated decimal points. See paragraph under test for additional informa- tion. 37 (3) OSC3 See pin 40. 38 (2) OSC2 See pin 40. 40 (1) OSC1 Pins 40, 39 and 38 make up the oscillator section. For a 48 kHz clock (3 readings 39per second), connect pin 40 to the junction of a 180 k Ω resistor and a 50 pF capacitor. The 180 k Ω resistor is tied to pin 39 and the 50 pF capacitor is tied to pin 38. Figure 1. Basic Dual-Slope Converter where: VR = Reference voltage tSI = Signal integration time (fixed) tRI = Reference voltage integration time (variable). GENERAL THEORY OF OPERATION (All Pin Designations Refer to the 40-Pin DIP) Dual-Slope Conversion Principles The TC7126A is a dual-slope, integrating analog-to- digital converter. An understanding of the dual-slope con- version technique will aid in following detailed TC7126A operational theory. The conventional dual-slope converter measurement cycle has two distinct phases: (1) Input signal integration (2) Reference voltage integration (deintegration) The input signal being converted is integrated for a fixed time period (tSI), measured by counting clock pulses. An opposite polarity constant reference voltage is then integrated until the integrator output voltage returns to zero. The reference integration time is directly proportional to the input signal (tRI). In a simple dual-slope converter, a complete conver- sion requires the integrator output to "ramp-up" and "ramp- down." A simple mathematical equation relates the input signal, reference voltage, and integration time: REF VOLTAGE ANALOG INPUT SIGNAL DISPLAY SWITCH DRIVER CONTROL LOGIC CLOCK COUNTER POLARITY CONTROL PHASE CONTROL VIN VIN VFULL SCALE 1.2 VFULL SCALE VARIABLE REFERENCE INTEGRATE TIME FIXED SIGNAL INTEGRATE TIME INTEGRATOR COMPARATOR 1VR tRI RC RC VIN(t) dt = , ∫tSI 0 |
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