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LT1964ES5-5TR Datasheet(PDF) 4 Page - Linear Technology |
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LT1964ES5-5TR Datasheet(HTML) 4 Page - Linear Technology |
4 / 16 page LT1964 4 1964fb Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime Note 2: The LT1964 (adjustable version) is tested and specified for these conditions with the ADJ pin connected to the OUT pin. Note 3: Operating conditions are limited by maximum junction temperature. The regulated output voltage specification will not apply for all possible combinations of input voltage and output current. When operating at maximum input voltage, the output current range must be limited. When operating at maximum output current, the input voltage range must be limited. Note 4: To satisfy requirements for minimum input voltage, the LT1964 (adjustable version) is tested and specified for these conditions with an external resistor divider (two 249k resistors) for an output voltage of –2.44V. The external resistor divider will add a 5μA DC load on the output. Note 5: Dropout voltage is the minimum input to output voltage differential needed to maintain regulation at a specified output current. In dropout, the output voltage will be equal to: (VIN + VDROPOUT). Note 6: GND pin current is tested with VIN = VOUT(NOMINAL) and a current source load. This means the device is tested while operating in its dropout region. This is the worst-case GND pin current. The GND pin current will decrease slightly at higher input voltages. Note 7: ADJ pin bias current flows out of the ADJ pin. Note 8: Positive SHDN pin current flows into the SHDN pin. SHDN pin current is included in the GND pin current specification. Note 9: For input-to-output differential voltages greater than 7V, a 50μA load is needed to maintain regulation. Note 10: The LT1964 is tested and specified under pulse load conditions such that TJ ≅ TA. The LT1964E is tested at TA = 25°C. Performance at –40°C to 125°C is assured by design, characterization and correlation with statistical process controls. The LT1964I is guaranteed over the full –40°C to 125°C operating junction temperature range. Note 11: A parasitic diode exists internally on the LT1964 between the OUT, ADJ and SHDN pins and the IN pin. The OUT, ADJ and SHDN pins cannot be pulled more than 0.5V more negative than the IN pin during fault conditions, and must remain at a voltage more positive than the IN pin during operation. Note 12: For the LT1964-BYP, this specification accounts for the operating threshold of the SHDN pin, which is tied to the IN pin internally. For the LT1964-SD, the SHDN threshold must be met to ensure device operation. Note 13: Actual thermal resistance ( θJA) junction to ambient will be a function of board layout. See the Thermal Considerations section in the Applications Information. ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. Output Voltage Noise COUT = 10μF, CBYP = 0.01μF, ILOAD = –200mA, BW = 10Hz to 100kHz 30 μVRMS ADJ Pin Bias Current (Notes 2, 7) 30 100 nA Minimum Input Voltage (Note 12) ILOAD = –200mA LT1964-BYP LT1964-SD l l –1.9 –1.6 –2.8 –2.2 V V Shutdown Threshold VOUT = Off to On (Positive) VOUT = Off to On (Negative) VOUT = On to Off (Positive) VOUT = On to Off (Negative) l l l l 0.25 –0.25 1.6 –1.9 0.8 –0.8 2.1 –2.8 V V V V SHDN Pin Current (Note 8) VSHDN = 0V VSHDN = 15V VSHDN = –15V –1 ±0.1 6 –3 1 15 –9 μA μA μA Quiescent Current in Shutdown VIN = –6V, VSHDN = 0V l 310 μA Ripple Rejection VIN – VOUT = –1.5V(Avg), VRIPPLE = 0.5VP-P, fRIPPLE = 120Hz, ILOAD = –200mA 46 54 dB Current Limit VIN = –6V, VOUT = 0V VIN = VOUT(NOMINAL) –1.5V, ΔVOUT = 0.1V l 220 350 mA mA Input Reverse Leakage Current VIN = 20V, VOUT, VADJ, VSHDN = Open Circuit l 1mA |
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