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LT1129IS8-3.3 Datasheet(PDF) 10 Page - Linear Integrated Systems |
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LT1129IS8-3.3 Datasheet(HTML) 10 Page - Linear Integrated Systems |
10 / 16 page 10 LT1129/LT1129-3.3/LT1129-5 112935fc Thermal Considerations The power handling capability of the device will be limited by the maximum rated junction temperature (125°C). The power dissipated by the device will be made up of two components: 1. Output current multiplied by the input/output voltage differential: IOUT • (VIN – VOUT), and 2. Ground pin current multiplied by the input voltage: IGND • VIN. The ground pin current can be found by examining the Ground Pin Current curves in the Typical Performance Characteristics. Power dissipation will be equal to the sum of the two components listed above. The LT1129 series regulators have internal thermal limit- ing designed to protect the device during overload condi- tions. For continuous normal load conditions the maxi- mum junction temperature rating of 125°C must not be exceeded. It is important to give careful consideration to all sources of thermal resistance from junction to ambient. Additional heat sources mounted nearby must also be considered. For surface mount devices heat sinking is accomplished by using the heat spreading capabilities of the PC board and its copper traces. Experiments have shown that the heat spreading copper layer does not need to be electri- cally connected to the tab of the device. The PC material can be very effective at transmitting heat between the pad area, attached to the tab of the device, and a ground or power plane layer either inside or on the opposite side of the board. Although the actual thermal resistance of the PC material is high, the length/area ratio of the thermal resistor between layers is small. Copper board stiffeners and plated through holes can also be used to spread the heat generated by power devices. The following tables list thermal resistances for each package. For the TO-220 package, thermal resistance is given for junction-to-case only since this package is usually mounted to a heat sink. Measured values of thermal resistance for several different board sizes and copper areas are listed for each package. All measure- ments were taken in still air on 3/32" FR-4 board with 1-oz copper. This data can be used as a rough guideline in estimating thermal resistance. The thermal resistance for each application will be affected by thermal interactions with other components as well as board size and shape. Some experimentation will be necessary to determine the actual value. Table 1. Q Package, 5-Lead DD COPPER AREA TOPSIDE* BACKSIDE BOARD AREA 2500 sq. mm 2500 sq. mm 2500 sq. mm 25°C/W 1000 sq. mm 2500 sq. mm 2500 sq. mm 27°C/W 125 sq. mm 2500 sq. mm 2500 sq. mm 35°C/W * Tab of device attached to topside copper THERMAL RESISTANCE (JUNCTION-TO-AMBIENT) Table 2. ST Package, 3-Lead SOT-223 COPPER AREA TOPSIDE* BACKSIDE BOARD AREA 2500 sq. mm 2500 sq. mm 2500 sq. mm 45°C/W 1000 sq. mm 2500 sq. mm 2500 sq. mm 45°C/W 225 sq. mm 2500 sq. mm 2500 sq. mm 53°C/W 100 sq. mm 2500 sq. mm 2500 sq. mm 59°C/W * Tab of device attached to topside copper THERMAL RESISTANCE (JUNCTION-TO-AMBIENT) Table 3. S8 Package, 8-Lead Plastic SOIC COPPER AREA TOPSIDE* BACKSIDE BOARD AREA 2500 sq. mm 2500 sq. mm 2500 sq. mm 55°C/W 1000 sq. mm 2500 sq. mm 2500 sq. mm 55°C/W 225 sq. mm 2500 sq. mm 2500 sq. mm 63°C/W 100 sq. mm 2500 sq. mm 2500 sq. mm 69°C/W * Device attached to topside copper THERMAL RESISTANCE (JUNCTION-TO-AMBIENT) T Package, 5-Lead TO-220 Thermal Resistance (Junction-to-Case) = 5°C/W APPLICATIO S I FOR ATIO |
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