PRODUCT SELECTION GUIDE

PARAMETER

57C51C-35

57C51C-45

57C51C-55

57C51C-70

Address Access Time (Max)

35 ns

45 ns

55 ns

70 ns

CS to Output Valid Time (Max)

20 ns

20 ns

25 ns

30 ns

WS57C51C

2-47

HIGH SPEED 16K x 8 CMOS PROM/RPROM

KEY FEATURES

and N82HS1281

GENERAL DESCRIPTION

The WS57C51C is a High Performance 128K UV Erasable Electrically Re-Programmable Read Only Memory

(RPROM). It is manufactured in an advanced CMOS technology which enables it to operate at Bipolar PROM

speeds while consuming only 25% of the power required by its Bipolar counterparts.

A further advantage of the WS57C51C over Bipolar PROM devices is the fact that it utilizes a proven EPROM

technology. This enables the entire memory array to be tested for switching characteristics and functionality after

assembly. Unlike devices which cannot be erased, every WS5751C in a windowed package is 100% tested with

worst case test patterns both before and after assembly.

The WS57C51C provides a low power alternative to those designs which are committed to a Bipolar PROM

footprint. It is a direct drop-in replacement for a Bipolar PROM of the same architecture (16K x 8). No software,

hardware or layout changes need be performed.

A10

A11

A12

A13

CS1/VPP

CS2

CS3

CS4

GND

1

2

3

4

5

6

7

8

9

10

11

12

13

14

28

27

26

25

24

23

22

21

20

19

18

17

16

15

CS2

CS3

CS4

NC

NC

1

43

2

32 31 30

29

28

27

26

25

24

23

22

21

5

6

7

8

9

10

11

12

13

14 15 16 17 18 19 20

TOP VIEW

Chip Carrier

CERDIP

PIN CONFIGURATION

ROW

DECODER

EPROM ARRAY

131,072 BITS

COLUMN

DECODER

SENSE

AMPLIFIERS

8

CS3

CS4

OUTPUTS

A0 - A5

COLUMN

ADDRESSES

A6 - A13

ROW

ADDRESSES

8

6

CS2

BLOCK DIAGRAM

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