Electronic Components Datasheet Search |
|
ATSAM2533 Datasheet(PDF) 5 Page - ATMEL Corporation |
|
ATSAM2533 Datasheet(HTML) 5 Page - ATMEL Corporation |
5 / 19 page 5 6396A–DRMSD–15-Oct-08 ATSAM2533 5. Pinout 5.1 Pin Description by Function 100-pin LQFP Package • 5VT indicates a 5 volt tolerant input or i/O pin. Table 5-1. ATSAM2523 Pinout by Name Name Pin# TYPE Function GND 1, 12, 26, 41, 51, 69, 76, 77, 84 PWR Power ground - all GND pins should be returned to digital ground VD18 79 PWR Power for the internal PLL, + 1.8V nominal (1.8V ± 10%). These pins can be connected to the output of the regulator OUTVC18 (pin 34). A 100 nF decoupling capacitor should be connected between this pin and PLL ground (pin77) VD33 13, 25, 33, 42, 50, 59, 68, 75, 83, 100 PWR Periphery power + 3V to 3.6V. All VD33 pins should be returned to nominal +3.3V. OUTVC18 34 PWR 3.3V to 1.8 V regulator output. The built-in regulator gives 1.8V for internal use (core supply). PLL supply pin VD18 could also be connected to this pin. Decoupling capacitors 470pF in parallel with 2.2 or 4.7µF must be connected between OUTVC18 and GND. D0-D7 4-11 I/O 5VT 8 bit data bus to host processor. Information on these pins is parallel MIDI CS 2 IN 5VT Chip select from host, active low. WR 99 IN 5VT Write from host, active low. RD 3 IN 5VT Read from host, active low. A0 98 IN 5VT Select address of slave 8-bit interface registers: 0: data registers (read/write) 1: status register (read) control register (write) This pin has a built-in pull down. IRQ 97 OUT Slave 8bit interface interrupt request. High when data is ready to be transferred from chip to host. Reset by a read from host (CS/=0 and RD/=0) RESET 82 IN 5VT Master reset input, active low. X1,X2 80, 81 – Crystal connection. Crystal frequency should be Fs * 256 (typ 12.288 MHz) Xtal frequency is internally multiplied by 4 to provide the IC master clock. An external 12.288 MHz clock can also be used on X1 (Analog or 3.3V CMOS logic). X2 cannot be used to drive external ICs, use CKOUT instead. CKOUT 88 OUT Buffered X2 output, can be used to drive external DAC master clock (256 * Fs) DABD0-1 91, 92 OUT Two stereo serial audio data output (4 audio channels). Each output holds 64 bits (2 x 32) of serial data per frame. Audio data has up to 20 bits precision. CLBD 89 OUT Audio data bit clock, provides timing to DABD0-1, DAAD. WSBD 90 OUT Audio data word select. The timing of WSBD can be selected to be I2S or Japanese compatible. DAAD 93 IN 5VT Stereo serial audio data input. P0-P3 49, 52-54 I/O 5VT General purpose programmable I/O pins. These pins have a built-in pull down. |
Similar Part No. - ATSAM2533 |
|
Similar Description - ATSAM2533 |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.COM |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |