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AT24C32CU2-UU-T Datasheet(PDF) 7 Page - ATMEL Corporation |
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AT24C32CU2-UU-T Datasheet(HTML) 7 Page - ATMEL Corporation |
7 / 28 page 7 5298A–SEEPR–1/08 AT24C32C/64C 5. Bus Timing SCL: Serial Clock, SDA: Serial Data I/O 6. Write Cycle Timing SCL: Serial Clock, SDA: Serial Data I/O Note: 1. The write cycle time tWR is the time from a valid stop condition of a write sequence to the end of the internal clear/write cycle. SCL SDA IN SDA OUT t F t HIGH t LOW t LOW t R t AA t DH t BUF t SU.STO t SU.DAT t HD.DAT t HD.STA t SU.STA t wr (1) STOP CONDITION START CONDITION WORDn ACK 8th BIT SCL SDA |
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