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DS80C320-ECG Datasheet(PDF) 7 Page - Maxim Integrated Products |
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DS80C320-ECG Datasheet(HTML) 7 Page - Maxim Integrated Products |
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7 / 40 page  DS80C320/DS80C323 High-Speed/Low-Power Microcontrollers 7 of 40 Figure 2. Comparative Timing of the DS80C320/DS80C323 and 80C32 DS80C320/DS80C323 TIMING STANDARD 80C32 TIMING HIGH-SPEED OPERATION The DS80C320/DS80C323 are built around a high-speed, 80C32-compatible core. Higher speed comes not just from increasing the clock frequency but also from a newer, more efficient design. In this updated core, dummy memory cycles have been eliminated. In a conventional 80C32, machine cycles are generated by dividing the clock frequency by 12. In the DS80C320/DS80C323, the same machine cycle is performed in 4 clocks. Thus the fastest instruction, one machine cycle, is executed three times faster for the same crystal frequency. Note that these are identical instructions. Figure 2 shows a comparison of the timing differences. The majority of instructions will see the full 3-to-1 speed improvement. Some instructions will get between 1.5X and 2.4X improvement. Note that all instructions are faster than the original 80C51. Table 1 shows a summary of the instruction set, including the speed. The numerical average of all op codes is approximately a 2.5-to-1 speed improvement. Individual programs are affected differently, depending on the actual instructions used. Speed-sensitive applications would make the most use of instructions that are three times faster. However, the sheer number of 3-to-1 improved op codes makes dramatic speed improvements likely for any code. The Dual Data Pointer feature also allows the user to eliminate wasted instructions when moving blocks of memory. |
Similar Part No. - DS80C320-ECG |
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Similar Description - DS80C320-ECG |
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