8

4530G–BCD–09/05

T6818/ATA6828

Note:

1. Test pulse 5: V

7.

Noise and Surge Immunity

Parameters

Test Conditions

Value

Conducted interferences

ISO 7637-1

Interference suppression

VDE 0879 Part 2

Level 5

ESD (Human Body Model)

ESD S 5.1

2 kV

ESD (Machine Model)

JEDEC A115A

200 V

8.

Electrical Characteristics

No.

Parameters

Test Conditions

Pin

Symbol

Min.

Typ.

Max.

Unit

Type*

1

Current Consumption

1.1

Quiescent current VS

3

1

5

µA

A

1.2

Quiescent current VCC

INH = low

11

I

VCC

15

25

µA

A

1.3

Supply current VS

V

operating, all outputs off

3

4

6

mA

A

1.4

Supply current VCC

4.75 V < V

normal operating

11

I

VCC

350

500

µA

A

1.5

Discharge current VS

INH = low

3

I

VS

0.5

5.5

mA

A

1.6

Discharge current VS

V

INH = low

3

2.5

10

mA

A

2

Undervoltage Detection, Power-on Reset

2.1

Power-on reset

threshold

11

V

VCC

3.2

3.9

4.4

V

A

2.2

Power-on reset

delay time

30

95

190

µs

A

2.3

Undervoltage-detection

threshold

3

5.6

7.0

V

A

2.4

Undervoltage-detection

hysteresis

V

3

∆V

Uv

0.6

V

A

2.5

Undervoltage-detection

delay time

10

40

µs

A

3

Thermal Prewarning and Shutdown

3.1

Thermal prewarning set

T

jPW set

120

145

170

°C

B

3.2

Thermal prewarning

reset

105

130

155

°C

B

3.3

Thermal prewarning

hysteresis

∆T

jPW

15

°C

B

3.4

Thermal shutdown off

T

j switch off

150

175

200

°C

B

3.5

Thermal shutdown on

T

j switch on

135

160

185

°C

B

*) Type means: A =100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter

Note:

1. Delay time between rising edge of input signal at pin CS after data transmission and switch on output stages to 90% of final

level. Device not in standby for t > 1 ms