 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
ACS8527T Datasheet(PDF) 8 Page - Semtech Corporation |
|
||||||||||||||||||||||||||||||
ACS8527T Datasheet(HTML) 8 Page - Semtech Corporation |
|
|
8 / 22 page  ADVANCED COMMUNICATIONS FINAL DATASHEET Revision 4.01/June 2006 © Semtech Corp. Page 8 www.semtech.com ACS8527 MUXPLL DPLL Acquisition Bandwidth The ACS8527 DPLL has a preset acquisition bandwidth of 70 Hz. DPLL Input Tracking (Locked) Bandwidth The ACS8527 DPPL has a preset tracking bandwidth of 35 Hz. This bandwidth setting corresponds to the -3 dB jitter attenuation point on the ACS8527’s jitter transfer characteristic. DPLL Damping Factor The DPLL damping factor is 10, giving a PLL jitter transfer peak gain of 0.06 dB. Fast Activity Monitor Anomalies on the selected clock have to be detected as they occur and the PLL must be temporarily isolated until the clock is once again pure. The phase locked loop itself contains a fast activity monitor such that within approximately two missing input clock cycles, the LOS alarm on pin LOS_ALARM is raised and the DPLL is frozen in Digital Holdover mode. With the DPLL in Digital Holdover mode it is isolated from further disturbances. If the input becomes active again then the DPLL will continue to lock to the input, with little disturbance. Outputs The ACS8527 delivers four output signals on the following ports: Two clocks, one each on outputs O1 and O2, and two Sync signals, one each on output ports FrSync and MFrSync. Outputs O1 and O2 are independent of each other and are individually selectable. Output 01 is an LVDS compatible differential port (pins O1POS and O1NEG). Output O2 (pin O2) and the Sync outputs are TTL/CMOS compatible. The two Sync outputs, FrSync (8 kHz) and MFrSync (2 kHz), are derived from the DPLL. Output Frequency Selection The frequencies available on the outputs can be selected from a range of spot frequencies by hardware selection, configuring the pins OP_FREQ1 [2:0], OP_FREQ2[2:0] and SONSDH, which are read on reset. Tables 5 and 6 show the hardware settings for selecting from 11 output frequencies on outputs 01 and 02. Table 5 Output 01 Frequency Selection by Hardware Configuration O1_FREQ SONSDHB Pin Output Frequency/ MHz Jitter Level (typ) 2 1 0 rms (ps) p-p (ns) 00 0 X 0 - - 00 1 0 34.368 120 1 1 44.736 110 1 0 1 0 X 19.44 60 0.6 0 1 1 X 25.92 60 0.6 1 0 0 X 38.88 60 0.6 1 0 1 X 51.84 60 0.6 1 1 0 X 77.76 60 0.6 1 1 1 X 155.52 60 0.6 |
Similar Part No. - ACS8527T |
|
Similar Description - ACS8527T |
|
|
|
Link URL |
| Privacy Policy |
| ALLDATASHEET.COM |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
