 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
ACS8526T Datasheet(PDF) 9 Page - Semtech Corporation |
|
||||||||||||||||||||||||||||||
ACS8526T Datasheet(HTML) 9 Page - Semtech Corporation |
|
|
9 / 74 page  ADVANCED COMMUNICATIONS FINAL DATASHEET Revision 4.01/June 2006 © Semtech Corp. Page 9 www.semtech.com ACS8526 LC/P LITE input phase change, DPLL bandwidth, DPLL frequency limit, and phase detector capture range. The ACS8526 always complies with GR-1244-CORE[13] spec for Stratum 3 (max rate of phase change of 81 ns/1.326 ms), for input frequencies at 6.48 MHz or higher, with the default 1UI phase detector capture range. For inputs at a lower frequency than 6.48 MHz (e.g. 8 kHz) with the DPLL frequency limit set to greater than ±30 ppm (note default is ±80 ppm), then to ensure compliance with GR-1244-CORE[13] at DPLL bandwidth settings of 18, 35 or 70 Hz, the input phase difference between the Master and Slave inputs to the line card PLL should be limited to less than 600, 330 ns or 190 ns respectively. Alternatively, the DPLL frequency range should be set <±30 ppm. A well designed system would have Master and Slave clock from the clock sync cards aligned to within a few nanoseconds. In which case a complete system using the Semtech SETS clock card parts (ACS8530, ACS8520 or ACS8510) and this line card part would be fully compliant to GR-1244-CORE[13] specifications under all conditions due to the lower frequency range and bandwidth set at the clock card end. Activity Monitors Two types of Activity monitors are incorporated in the ACS8526: SEC Activity Monitors, which raise flags in Reg. 11, sts_reference_sources for each SEC in event of no input activity, as defined by the configuration of Leaky Bucket accumulator. Fast Activity Monitor (part of DPLL), which raises LOS alarm on pin LOS_ALARM in event of two missing cycles of input activity on the selected source. SEC Activity Monitors There is a SEC activity monitor assigned to each SEC input. Each has a programmable Leaky Bucket Accumulator which is used to determine at what point the period of inactivity is deemed sufficient to raise or clear an alarm. Each SEC has its own no activity alarm bit in Reg. 11, sts_reference_sources,. The monitors operate continuously such that at all times the activity status of each SEC input is known. Leaky Bucket Accumulator Anomalies detected by the Activity Monitor are integrated in a Leaky Bucket Accumulator. There is one Leaky Bucket Accumulator per SEC input. The accumulators share a set of configuration parameters which can be programmed via Reg. 50 to Reg. 53. They are: Bucket size Alarm trigger (set threshold) Alarm clear (reset threshold) Leak rate (decay rate) There are occasional anomalies that do not cause the Accumulator to cross the alarm setting threshold, but if the Bucket fills faster than it leaks it will eventually cross the alarm setting threshold and the associated SEC Input Activity Alarm bit in Reg. 11, sts_reference_sources, will change to 1 (Alarm active). Each Leaky Bucket Accumulator is a digital circuit which mimics the operation of an analog integrator. If several events occur close together, each event adds to the amplitude and the alarm will be triggered quickly; if events occur over a greater time period but still sufficiently close together to overcome the decay, the alarm will be triggered eventually. If events occur at a rate which is not sufficient to overcome the decay, the alarm will not be triggered. Similarly, if no defect events occur for a sufficient time, the amplitude will decay gradually and the alarm will be cleared when the amplitude falls below the alarm clearing threshold. The ability to decay the amplitude over time allows the importance of defect events to be reduced as time passes by. This means that, in the case of isolated events, the alarm will not be set, whereas, once the alarm becomes set, it will be held on until normal operation has persisted for a suitable time (but if the operation is still erratic, the alarm will remain set). Figure 3 illustrates the behavior of the Leaky Bucket Accumulator. Each SEC input is monitored over a 128 ms period. If, within a 128 ms period, an irregularity occurs that is not deemed to be due to allowable jitter/wander, then the Accumulator is incremented. The Accumulator continues to increment up to the point that it reaches the programmed Bucket size. The “fill rate” of the Leaky Bucket is, therefore, 8 units/second. The “leak rate” of the Leaky Bucket is programmable to be in multiples of the fill rate (x 1, x 0.5, x 0.25 and x 0.125) to give a programmable leak rate from 8 units/sec down to 1 unit/sec. A conflict between trying to “leak” at the same time as a “fill” is avoided by preventing a leak when a fill event occurs. |
Similar Part No. - ACS8526T |
|
Similar Description - ACS8526T |
|
|
Link URL |
| Privacy Policy |
| ALLDATASHEET.COM |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
