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6420EVM Datasheet(PDF) 7 Page - Semtech Corporation |
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6420EVM Datasheet(HTML) 7 Page - Semtech Corporation |
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7 / 29 page  7 2000 Semtech Corp. www .semtech.com HIGH-PERFORMANCE PRODUCTS – ATE Edge6420 Circuit Description (continued) DAC Voltage Output Overview The output voltage of Group A, B, C, and D DACs is governed by the following equation: Equation 1. where: DATA corresponds to the base-10 value of the binary data loaded into the shift register shown in Figure 2. K G[A:D] is a multiplying factor that is fixed, as follows: KGA = 4 KGB = 4 KGC = 8 KGD = 4 VREF = 2.5V Offset The offset for each of the voltage DACs is governed by the following equation: Equation 2. where: K OFFSET = 2 V REF = 2.5V External Resistors The recommended resistor values for the above equations are as follows: R_MASTER = 100K Ω (0.1% precision) R_GAIN_[A:D] = (0.4 to 1.15) * R_MASTER R_OFFSET_[A:D] = (0.0 to 1.2) * R_MASTER Minimum / Maximum Output Voltages See Table 2 for the minimum and maximum possible voltages of a voltage output. Table 2. Minimum/Maximum Output Voltages where: VOFFSET[A:D] is defined in equation 2 and Equation 3. The most negative voltage possible for the Edge6420 is –3.5V when VEE = –4.5V. Resolution The resolution of the DACs in Groups A, B, C, and D is: VRANGE_[A:D] / 213 where VRANGE_[A:D] is defined in Equation 4. Range The range of the DACs in Groups A, B, C and D is: Equation 4. VOUT_[A:D] = * KG[A:D] * VREF + VOFFSET_[A:D] R_GAIN_[A:D] R_MASTER * DATA 8192 VOFFSET_[A:D] KOFFSET R_OFFSET_[A:D] R_MASTER = * * 0.5 – VREF g n i t t e S C A D B S L .. . B S M V ] D : A [ _ T U O ) V ( H 0 0 0 0 V ] D : A [ _ T E S F F O H F F F 1 V ] D : A [ _ X A M VMAX_[A:D] = + VOFFSET_[A:D] R_GAIN_[A:D] R_MASTER KG[A:D] * VREF 8191 8192 * * = VRANGE_[A:D] R_GAIN_[A:D] R_MASTER 8191 8192 KG[A:D] VREF * * * |
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