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TSS463B-TERA-9 Datasheet(PDF) 1 Page - ATMEL Corporation |
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TSS463B-TERA-9 Datasheet(HTML) 1 Page - ATMEL Corporation |
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1 / 59 page  Rev. 4102E–AUTO–12/04 1 Features • Fully Compliant to VAN Specification ISO/11519-3 • Handles All Specified Module Types • Handles All Specified Message Types • Handles Retransmission of Frames on Contention and Errors • 3 Separate Line Inputs with Automatic Diagnosis and Selection • Normal or Pulsed (Optical and Radio Mode) Coding • VAN Transfer Rate: 1 Mbit/s Maximum • SPI/SCI Interface • SPI Transfer Rate: 4 Mbits/s Maximum SCI Transfer Rate: 125 Kbits/s Maximum • Idle and Sleep Modes • 128 Bytes of General Purpose RAM • 14 Identifier Registers with All Bits Individually Maskable • 6-source Maskable Interrupt Including an Interrupt-on-reset to Detect Glitches on the Reset Pin • Integrated Crystal or Resonator Oscillator with Internal Baud Rate Generator and Buffered Clock Output • Single +5V Power Supply • 0.5 µm CMOS Technology • SO16 Package Description The TSS463B is a circuit that allows the transfer of all the status information needed in a car or truck over a single low-cost wire pair, thereby minimizing electrical wire usage. It can be used to interconnect powerful functions and to control and interface car body electronics (lights, wipers, power window, etc.). The TSS463B is fully compliant with the VAN ISO standard 11519-3. This standard supports a wide range of applications such as low-cost remote controlled switches, typically it is used for lamp control, up to complex, highly autonomous, distributed sys- tems that require fast and secure data transfers. The TSS463B is a microprocessor-interfaced line controller for mid-to-high complexity bus-masters and listeners like dashboard controllers, car stereo or mobile telephone CPUs. The microprocessor interface consists of a 256-byte RAM and a register area divided into 11 control registers, 14 channel register sets and 128 bytes of general-purpose RAM, used as a message storage area, and a 6-source maskable interrupt. The circuit operates in the RAM using DMA techniques, controlled by the channel and control registers. This allows virtually any microprocessor, including SPI/SCI interface, to be connected with ease to the TSS463B. Messages are encoded in enhanced Manchester code, and an optional pulsed code for use with an optical or radio link, at a maximum bit rate of 1 Mbit/s. The TSS463B analyzes the messages received or transmitted according to 6 different criteria includ- ing some higher level checks. In addition, the bus interface has three separate inputs with automatic source diagno- sis and selection, allowing for multibus listening or the automatic selection of the most reliable source at any time if several line receivers are connected to the same bus. VAN Data Link Controller with Serial Interface TSS463B |
Similar Part No. - TSS463B-TERA-9 |
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Similar Description - TSS463B-TERA-9 |
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