Part Name
         Description
ML5805DM

 5.8GHz Variable Data Rate FSK Transceiver with Integrated PA ( 36 Page)


RFMD
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ML5805
RF MICRO DEVICES®, RFMD®, OPTIMUM TECHNOLOGY MATCHING®, ENABLING WIRELESS CONNECTIVITY™, POWERSTAR®, POLARIS™ TOTAL RADIO™ ULTIMATEBLUE™ AND FASTWAVE™ ARE TRADEMARKS OF RFMD, LLC. BLUETOOTH IS A TRADEMARK OWNED BY
BLUETOOTH SIG, INC., U.S.A. AND LICENSED FOR USE BY RFMD. ALL OTHER TRADE NAMES, TRADEMARKS AND REGISTERED TRADEMARKS ARE THE PROPERTY OF THEIR RESPECTIVE OWNERS. ©2006, RF MICRO DEVICES, INC.
PRELIMINARY DATA SHEET
APRIL 2008
EDS-106041 REV P01
7628 THORNDIKE ROAD, GREENSBORO, NC 27409-9421 · FOR SALES OR TECHNICAL
REV A1 DS071026 SUPPORT, CONTACT RFMD AT (+1) 336-678-5570 OR SALES-SUPPORT@RFMD.COM
17
TRANSMIT & RECEIVE DATA INTERFACES
There are two sets of transmit and receive data interfaces for the ML5805:
Baseband Data:
DIN, DOUT, AOUT, RXCLK, FREF, RSSI
RF Data:
RXIN, RXIP, TXO
Please refer to application schematic in Figure 4 for recommended component values.
BASEBAND DATA: DIN, DOUT, AOUT, RXCLK
The DIN pin is a CMOS logic level serial data input for 2-FSK modulation on the radio channel. This DIN pin drives data
bits into the transmit modulator. There is no re-timing of the chips, so the transmitted 2-FSK chips take their timing from
the DIN pin.
The DOUT pin is a corresponding CMOS level digital data output. In DS-FSK mode the ML5805 is designed to operate
as a Direct Sequence Spread Spectrum FSK transceiver in the 5.725 – 5.850GHz ISM band. The chip rate, bit rate and
spreading code are determined in the baseband processor, and the FM deviation and transmit filtering are determined
in the ML5805 transceiver.
Setting the AOUT bit in the serial register turns the AOUT pin into a buffered, single ended output from the data filter.
This can be used to drive an off chip data slicer, or an ADC input for a DSP data slicer.
When using the digital output DOUT, FM demodulation, data filtering and center slicing take place in the ML5805
receiver. A clock recovery circuit at the data slicer output extracts the receiver clock RXCLK for those applications that
do not have access to clock recovery circuitry.
The FREF pin is the master reference frequency (
fref ) input for the transceiver. It supplies the frequency reference for
the RF channel frequency and the on-chip filter tuning. The FREF pin is a clipped sine input with on-chip biasing
resistors. It can be driven by an AC coupled sine-wave or a CMOS
3 logic source. FREF is used as a calibration
frequency and as a timing reference in the control circuits. The reference source must be accurate to 20 PPM.
The RSSI (Received Signal Strength Indicator) pin supplies a voltage that indicates the amplitude of the received RF
signal. The RSSI voltage is proportional to the logarithm of the received power level. It can be connected to the input of
an ADC on the baseband IC, and is used during channel scanning to detect clear channels on which the radio can
transmit.
RF DATA: RXIN, RXIP, TXO
The RXIN and RXIP receive input and the TXO transmit output are the only RF I/O pins. The RXIN and RXIP pins
requires a single-ended to differential conversion from a 50
Ω input impedance and a matching network for best input
noise figure, and the TXO pin also requires a matching network for maximum power output into 50
Ω (see Figure 4).
3 For
V(fref ) > 1.5Vp-p, the level of the reference spurious response (fTX +/- fr ef ) to increases in proportion to V(fref ) .
V(fref ) levels that exceed 2.0Vp-p will cause the typical reference spur to be greater than -70dBc.



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