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ML2724 Datasheet(PDF) 9 Page - Micro Linear Corporation |
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ML2724 Datasheet(HTML) 9 Page - Micro Linear Corporation |
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9 / 26 page  ML2724 DS2724-F-03 FINAL DATASHEET DECEMBER 2005 9 21 TXO O (Analog) TX RF open-collector output. This output requires a DC path to VCCA. 22 TXOB O (Analog) Complementary TX RF open-collector output. This output requires a DC path to VCCA. For single-ended output applications, this pin should be connected to a dummy load that includes a DC path to VCCA. TXOB TXO GNDRF 18 21 22 DATA 7 AOUT A (Analog) Multi-function Output. In Analog output mode this is output drives an off chip data slicer. In Transmit power control mode this is an open drain output, which is pulled low when the TPC bit is serial register #1, is clear. Transitions on TPC are synchronized to the falling edge of RXON. In analog test modes this pin and the RSSI output become test access points controlled by the serial control bus. 31 VSS VDD 100 Ω 7 AOUT 8 TPQ MUX VSS 8 TPC MUX TPC AOUT MUX 30 DIN I (CMOS) Transmit Data Input. Drives the transmit pulse shaping circuits. Serial digital data on this pin becomes FSK modulation on the Transmit RF output. The logic timing on this pin controls data timing. Internal circuits determine the modulation deviation. This is a standard CMOS input referenced to VDD and VSS. See Pin 1 below. 32 DOUT O (CMOS) Serial digital output after demodulation, chip rate filtering and center data slicing. A CMOS level output (VSS to VDD) with controlled slew rates. A low drive output designed to drive a PCB trace and a CMOS logic input while generating minimal RFI. In digital test modes this pin becomes a test access port controlled by the serial control bus. 31 VSS VDD 250 Ω 32 DOUT 8 |
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