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UPSD3212 Datasheet(PDF) 1 Page - STMicroelectronics |
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UPSD3212 Datasheet(HTML) 1 Page - STMicroelectronics |
1 / 152 page 1/152 September 2003 Rev. 1.2 UPSD3212C UPSD3212CV Flash Programmable System Devices with 8032 Microcontroller Core and 16Kbit SRAM FEATURES SUMMARY s The uPSD321X Devices combine a Flash PSD architecture with an 8032 microcontroller core. The uPSD321X Devices of Flash PSDs feature dual banks of Flash memory, SRAM, general purpose I/O and programmable logic, supervi- sory functions and access via I2C, ADC and PWM channels, and an on-board 8032 micro- controller core, with two UARTs, three 16-bit Timer/Counters and two External Interrupts. As with other Flash PSD families, the uPSD321X Devices are also in-system programmable (ISP) via a JTAG ISP interface. s Large 2KByte SRAM with battery back-up option s Dual bank Flash memories – 64KByte main Flash memory – 16KByte secondary Flash memory s Content Security – Block access to Flash memory s Programmable Decode PLD for flexible address mapping of all memories within 8032 space. s High-speed clock standard 8032 core (12-cycle) s I2C interface for peripheral connections s 5 Pulse Width Modulator (PWM) channels s Analog-to-Digital Converter (ADC) s Six I/O ports with up to 46 I/O pins s 3000 gate PLD with 16 macrocells s Supervisor functions with Watchdog Timer s In-System Programming (ISP) via JTAG s Zero-Power Technology s Single Supply Voltage – 4.5 to 5.5V – 3.0 to 3.6V Figure 1. 52-lead, Thin, Quad, Flat Package Figure 2. 80-lead, Thin, Quad, Flat Package TQFP52 (T) TQFP80 (U) |
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