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AT25F2048-W27-11 Datasheet(PDF) 8 Page - ATMEL Corporation |
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AT25F2048-W27-11 Datasheet(HTML) 8 Page - ATMEL Corporation |
8 / 19 page 8 AT25F2048 2455I–SFLSH–5/07 READ PRODUCT ID (RDID): The RDID instruction allows the user to read the manufac- turer and product ID of the device. The first byte after the instruction will be the manufacturer code (1FH = ATMEL), followed by the device code, 63H. WRITE STATUS REGISTER (WRSR): The WRSR instruction allows the user to select one of four levels of protection for the AT25F2048. The AT25F2048 is divided into four sectors where the top quarter (1/4), top half (1/2), or all of the memory sectors can be protected (locked out) from write. Any of the locked-out sectors will therefore be read only. The locked-out sector and the corresponding status register control bits are shown in Table 7. The three bits, BP0, BP1, and WPEN, are nonvolatile cells that have the same proper- ties and functions as the regular memory cells (e.g., WREN, tWC, RDSR). Table 6. Read Status Register Bit Definition Bit Definition Bit 0 (RDY) Bit 0 = 0 (RDY) indicates the device is READY. Bit 0 = 1 indicates the write cycle is in progress. Bit 1 (WEN) Bit 1 = 0 indicates the device is not WRITE ENABLED. Bit 1 = 1 indicates the device is WRITE ENABLED. Bit 2 (BP0) See Table 7. Bit 3 (BP1) See Table 7. Bits 4-6 are 0s when device is not in an internal write cycle. Bit 7 (WPEN) See Table 8. Bits 0-7 are 1s during an internal write cycle. Table 7. Block Write Protect Bits Level Status Register Bits AT25F2048 BP1 BP0 Array Addresses Locked Out Locked-out Sector(s) 0 0 0 None None 1(1/4) 0 1 030000 - 03FFFF Sector 4 2(1/2) 1 0 020000 - 03FFFF Sector 3, 4 3(All) 1 1 000000 - 03FFFF All sectors (1 - 4) |
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