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2314E–FPSLI–6/05

AT94S Secure Family

4.9.5

Reading

Read instructions are initiated similarly to write instructions. However, with the R/W bit in the

Device Address set to one. There are three variants of the read instruction: current address

read, random read and sequential read.

For all reads, it is important to understand that the internal Data Byte address counter maintains

the last address accessed during the previous read or write operation, incremented by one. This

address remains valid between operations as long as the chip power is maintained and the

device remains in 2-wire access mode (i.e., SER_EN is driven Low). If the last operation was a

read at address n, then the current address would be n + 1. If the final operation was a write at

address n, then the current address would again be n + 1 with one exception. If address n was

the last byte address in the page, the incremented address n + 1 would “roll over” to the first byte

address on the next page.

4.9.5.1

Current Address Read

Once the Device Address (with the R/W select bit set to High) is clocked in and acknowledged

by the Configurator, the Data Byte at the current address is serially clocked out by the Configu-

rator in response to the clock from the programmer. The programmer generates a Stop

Condition to accept the single byte of data and terminate the read instruction.

A Current Address Read instruction consists of

a Start Condition

a Device Address with R/W = 1

An Acknowledge Bit from the Configurator

a Data Byte from the Configurator

a Stop Condition from the programmer.

4.9.5.2

Random Read

A Random Read is a Current Address Read preceded by an aborted write instruction. The write

instruction is only initiated for the purpose of loading the EEPROM Address Bytes. Once the

Device Address Byte and the EEPROM Address Bytes are clocked in and acknowledged by the

Configurator, the programmer immediately initiates a Current Address Read.

A Random Address Read instruction consists of :

a Start Condition

a Device Address with R/W = 0

An Acknowledge Bit from the Configurator

MS Byte of the EEPROM Address

An Acknowledge Bit from the Configurator

Next Byte of the EEPROM Address

An Acknowledge Bit from the Configurator

LS Byte of EEPROM Address

An Acknowledge bit from the Configurator

a Start Condition

a Device Address with R/W = 1

An Acknowledge Bit from the Configurator

a Data Byte from the Configurator

a Stop Condition from the programmer.