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AT32UC3A0128-ALUT Datasheet(PDF) 5 Page - ATMEL Corporation |
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AT32UC3A0128-ALUT Datasheet(HTML) 5 Page - ATMEL Corporation |
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5 / 86 page  5 32058FS–AVR32–08/08 AT32UC3A 4. Blockdiagram Figure 4-1. Blockdiagram UC CPU NEXUS C LASS 2+ OCD IN STR IN TER FAC E DATA IN TER FAC E TIM ER /CO UN TER IN TERR UPT CO NTRO LLER REAL TIME C O UNTER PER IPH ER AL DM A CO NTROLLER 512 KB FLASH H SB-PB BR ID G E B H SB-PB BR ID G E A S MM M M M S S S S S M EXTERNAL IN TERRUPT C O NTRO LLER H IG H SPEED BUS M ATR IX FAST G PIO 64 KB SR AM PA PB PC PX A[2..0] B[2..0] CLK [2..0] EXTIN T [7..0] KPS[7..0] NM I_N G C LK [3..0] XIN 32 XOU T32 XIN 0 XO U T 0 PA PB PC PX RE SET_N CAS RAS SD A 10 SDCK SDCKE SDCS0 SD W E N C S[3..0] NRD NW A IT NW E0 D ATA [15..0] USB IN TER FAC E DM A ID VB O F VBU S D- D+ ETHERNET MAC DM A 32 KH z OSC 115 kH z RC O SC OSC0 PLL0 PULSE W IDTH M O DULATIO N CO NTRO LLER SERIAL PER IPHER AL IN TER FAC E 0/1 TW O -W IR E IN TER FAC E MIS O , MO SI NPCS[3..1] PW M [6..0] SC L SD A USART1 RXD TXD CLK RTS, CTS DSR, DTR, DCD, RI USART0 USART2 USART3 RXD TXD CLK RTS, CTS SYN CHRO NO US SERIAL CO NTRO LLER TX_CLO C K, TX _FR AM E_SYN C RX_DATA TX_DATA RX_CLO CK, RX_FRAM E_SYN C AN ALOG TO DIG ITAL CO NVER TER AD [7..0] AD V R EF W ATC HDO G TIM ER XIN 1 XO U T 1 OSC1 PLL1 SC K JTAG IN TER FAC E MC KO MD O [5..0] M SEO [1..0] EVTI_N EV TO _N TC K TD O TD I TM S PO W ER MAN AG ER RESET CO NTRO LLER A DDR[23..0] SLEEP CO NTRO LLER CLO C K CO NTRO LLER CLO C K G ENERATO R CO L, CRS, RX D[3..0], RX _C LK , RX _D V, RX_ER M DC, TXD [3..0], TX _C LK , TX_E N , TX_E R , S PEE D MD IO CO NFIG URATIO N REGISTE RS B U S M EM O RY PR OTE C TION UNIT PB PB HSB HS B NW E1 NW E3 NPCS0 LO C A L B U S IN TER FAC E AUDIO BITSTR EAM DAC D ATA [1..0] DA TAN[1..0] |
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