3

8019IS–AVR–08/07

ATmega165P

2.

Overview

The ATmega165P is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By execut-

ing powerful instructions in a single clock cycle, the ATmega165P achieves throughputs approaching 1 MIPS per MHz

allowing the system designer to optimize power consumption versus processing speed.

2.1

Block Diagram

Figure 2-1.

Block Diagram

PROGRAM

COUNTER

INTERNAL

OSCILLATOR

WATCHDOG

TIMER

STACK

POINTER

PROGRAM

FLASH

MCU CONTROL

REGISTER

SRAM

GENERAL

PURPOSE

REGISTERS

INSTRUCTION

REGISTER

TIMER/

COUNTERS

INSTRUCTION

DECODER

DATA DIR.

REG. PORTB

DATA DIR.

REG. PORTE

DATA DIR.

REG. PORTA

DATA DIR.

REG. PORTD

DATA REGISTER

PORTB

DATA REGISTER

PORTE

DATA REGISTER

PORTA

DATA REGISTER

PORTD

TIMING AND

CONTROL

OSCILLATOR

INTERRUPT

UNIT

EEPROM

SPI

USART

STATUS

REGISTER

Z

Y

X

ALU

PORTB DRIVERS

PORTE DRIVERS

PORTA DRIVERS

PORTF DRIVERS

PORTD DRIVERS

PORTC DRIVERS

PB0 - PB7

PE0 - PE7

PA0 - PA7

PF0 - PF7

VCC

GND

AREF

CONTROL

LINES

PC0 - PC7

8-BIT DATA BUS

AVCC

CALIB. OSC

DATA DIR.

REG. PORTC

DATA REGISTER

PORTC

ON-CHIP DEBUG

JTAG TAP

PROGRAMMING

LOGIC

BOUNDARY-

SCAN

DATA DIR.

REG. PORTF

DATA REGISTER

PORTF

ADC

PD0 - PD7

DATA DIR.

REG. PORTG

DATA REG.

PORTG

PORTG DRIVERS

PG0 - PG4

UNIVERSAL

SERIAL INTERFACE

AVR CPU