PSMN9R0-30YL_1

© NXP B.V. 2008. All rights reserved.

Preliminary data sheet

Rev. 01 — 10 September 2008

10 of 13

NXP Semiconductors

PSMN9R0-30YL

N-channel TrenchMOS logic level FET

7.

Package outline

Fig 18. Package outline SOT669 (LFPAK)

REFERENCES

OUTLINE

VERSION

EUROPEAN

PROJECTION

ISSUE DATE

IEC

JEDEC

JEITA

SOT669

MO-235

04-10-13

06-03-16

0

2.5

5 mm

scale

e

E1

b

c2

A2

A2

bc

A

e

UNIT

DIMENSIONS (mm are the original dimensions)

mm

1.10

0.95

A3

A1

0.15

0.00

1.20

1.01

0.50

0.35

b2

4.41

3.62

b3

2.2

2.0

b4

0.9

0.7

0.25

0.19

c2

0.30

0.24

4.10

3.80

6.2

5.8

H

1.3

0.8

L2

0.85

0.40

L

1.3

0.8

L1

8

°

0

°

wy

5.0

4.8

3.3

3.1

E1

(1)

D1

(1)

max

0.25

4.20

1.27

0.25

0.1

1

23

4

mounting

base

D1

c

Plastic single-ended surface-mounted package (LFPAK); 4 leads

SOT669

E

b2

b3

b4

H

D

L2

L1

A

A

C

C

X

1/2

e

yC

θ

θ

(A )

3

L

A

A1

detail X

Note

1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.