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ATR0622P1 Datasheet(PDF) 5 Page - ATMEL Corporation |
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ATR0622P1 Datasheet(HTML) 5 Page - ATMEL Corporation |
5 / 11 page 5 4973AS–GPS–12/07 ATR0622P1 3. Pin Configuration 3.1 Pinout Figure 3-1. Pinout QFN56 (Top View) 42 29 114 43 28 56 15 ATR0622P1 Table 3-1. ATR0622P1 Pinout Pin Name QFN56 Pin Type Pull Resistor (Reset Value)(1) Firmware Label PIO Bank A IO CLK23 37 IN DBG_EN 8 IN PD GND (2) IN LDOBAT_IN 21 IN LDO_EN 25 IN LDO_IN 20 IN LDO_OUT 19 OUT NRESET 41 I/O Open drain PU NSHDN 26 OUT NSLEEP 24 OUT NTRST 13 IN PD P0 40 I/O PD NANTSHORT P1 47 I/O Configurable (PD) GPSMODE0 AGCOUT1 P2 46 I/O Configurable (PD) BOOT_MODE “0” P8 48 I/O Configurable (PD) STATUSLED “0” P9 29 I/O PU to VBAT18 EXTINT0 EXTINT0 P12 49 I/O Configurable (PU) GPSMODE2 NPCS2 P13 32 I/O PU to VBAT18 GPSMODE3 EXTINT1 Notes: 1. PD = internal pull-down resistor, PU = internal pull-up resistor, OH = switched to Output High at reset 2. Ground plane 3. VBAT18 represent the internal power supply of the backup power domain. 4. VDDIO is the supply voltage for the following GPIO-pins: P1, P2, P8, P12, P14, P16, P17, P18, P19, P20, P21, P23, P24, P25, P26, P27 and P29. 5. VDD_USB is the supply voltage for following the USB-pins: USB_DM and USB_DP. For operation of the USB interface, sup- ply of 3.0V to 3.6V is required. 6. This pin is not connected |
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Similar Description - ATR0622P1 |
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