HEF4021B_4

© NXP B.V. 2008. All rights reserved.

Product data sheet

Rev. 04 — 10 November 2008

8 of 14

NXP Semiconductors

HEF4021B

8-bit static shift register

12. Waveforms

Table 8.

Symbol

Parameter

where:

dynamic power

dissipation

5 V

Σ(C

10 V

15 V

Fig 4.

Waveforms showing propagation delays for CP and PL inputs to Qn output and Qn transition times

Fig 5.

Waveforms showing minimum clock pulse width, set-up time, and hold time for CP and DS.

001aaj060

CP or PL INPUT

Qn OUTPUT

001aae611

CP INPUT

DS INPUT