CY8C20x46, CY8C20x66
Document Number: 001-12696 Rev. *C
Page 9 of 34
24-Pin Part Pinout
Table 3. 24-Pin QFN Part Pinout(2, 3)
Pin
No.
Type
Name
Description
Figure 3. CY8C20346, CY8C20366 24-Pin PSoC Device
Digital Analog
1
IO
I
P2[5]
Crystal output (XOut).
2
IO
I
P2[3]
Crystal input (XIn).
3
IO
I
P2[1]
4
IOHR
I
P1[7]
I2C SCL, SPI SS.
5
IOHR
I
P1[5]
I2C SDA, SPI MISO.
6
IOHR
I
P1[3]
SPI CLK.
7
IOHR
I
P1[1]
ISSP CLK(1), I2C SCL, SPI
MOSI.
8
NC
No connection.
9
Power
Vss
Ground connection.
10
IOHR
I
P1[0]
ISSP DATA(1), I2C SDA, SPI
CLK.
11
IOHR
I
P1[2]
12
IOHR
I
P1[4]
Optional external clock input
(EXTCLK).
13
IOHR
I
P1[6]
14
Input
XRES
Active high external reset with
internal pull down.
15
IO
I
P2[0]
16
IOH
I
P0[0]
17
IOH
I
P0[2]
18
IOH
I
P0[4]
19
IOH
I
P0[6]
20
Power
Vdd
Supply voltage.
21
IOH
I
P0[7]
22
IOH
I
P0[5]
23
IOH
I
P0[3]
Integrating input.
24
IOH
I
P0[1]
Integrating input.
CP
Power
Vss
Center pad must be connected
to ground.
LEGEND A = Analog, I = Input, O = Output, OH = 5 mA High Output Drive, R = Regulated Output.
QFN
(Top View)
AI, I2C SCL, SPI SS, P1[7]
AI, I2C SDA, SPI MISO, P1[5]
AI, SPI CLK, P1[3]
1
2
3
4
5
6
18
17
16
15
14
13
P0[2], AI
P0[0], AI
P0[4], AI
AI, P2[1]
P1[6], AI
XRES
P2[0], AI
AI, XOut, P2[5]
AI, XIn, P2[3]
Note
3. The center pad (CP) on the QFN package must be connected to ground (Vss) for best mechanical, thermal, and electrical performance. If not connected to ground, it
should be electrically floated and not connected to any other signal.
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