CY2CC910
Document #: 38-07348 Rev. *C
Page 5 of 11
High Frequency Parametrics
Parameter
Description
Test Conditions
Min
Typ
Max
Unit
DJ
Jitter, Deterministic
50% duty cycle tW(50–50)
The “point to point load circuit”
| Output Jitter – Input Jitter |
See Figure 5
20
ps
Fmax
3.3V
Maximum frequency
VDD = 3.3V
50% duty cycle tW(50–50)
Standard Load Circuit.
See Figure 3
160
MHz
50% duty cycle tW(50–50)
The “point to point load circuit”
See Figure 5
650
Fmax
2.5V
Maximum frequency
VDD = 2.5V
The “point-to-point load circuit”
VIN = 2.4V/0.0V VOUT = 1.7V/0.7V
See Figure 5
200
MHz
Fmax
1.8V
Maximum frequency
VDD = 1.8V
The “6-pF load circuit”
VIN = 1.7/0.0V VOUT = 1.2V/0.4V
See Figure 7
200
MHz
Fmax(20)
Maximum frequency
VDD = 3.3V
20% duty cycle tW(20-80)
The “point to point load circuit”
VIN = 3.0V/0.0V VOUT = 2.3V/0.4V
See Figure 6
250
MHz
tW
3.3V
Minimum pulse
VDD = 3.3V
The “point-to-point load circuit”
VIN = 3.0V/0.0V F = 100 MHz
VOUT = 2.0V/0.8V
See Figure 5
1ns
tW
2.5V
Minimum pulse
VDD = 2.5V
The “point-to-point load circuit”
VIN = 2.4V/0.0V
F = 100 MHz
VOUT = 1.7V/0.7V
See Figure 5
1ns
tW
1.8V
Minimum pulse
VDD = 1.8V
The “6-pF load circuit”
VIN = 1.7V/0.0V VOUT = 1.2V/0.4V
See Figure 7
1ns
AC Switching Characteristics
At 3.3V (VDD = 3.3V ± 5%, Temperature = –40°C to +85°C)
Parameter
Description
Min
Typ
Max
Unit
tPLH
Propagation Delay – Low to High
See Figure 4
1.5
2.7
3.5
ns
tPHL
Propagation Delay – High to Low
1.5
2.7
3.5
ns
tR
Output Rise Time
0.8
V/ns
tF
Output Fall Time
0.8
V/ns
tSK(0)
Output Skew: Skew between outputs of the same package (in
phase).
See Figure 11
0.2
ns
tSK(p)
Pulse Skew: Skew between opposite transitions of the same
output (tPHL – tPLH).
See Figure 10
0.2
ns
tSK(t)
Package Skew: Skew between outputs of different packages at
the same power supply voltage, temperature and package type.
See Figure 12
0.4
ns
At 2.5V (VDD = 2.5V ± 5%, Temperature = –40°C to +85°C)
Parameter
Description
Min
Typ Max Unit
tPLH
Propagation Delay – Low to High
See Figure 4
1.5
2.7
3.5
ns
tPHL
Propagation Delay – High to Low
1.5
2.7
3.5
ns
tR
Output Rise Time
0.8
V/ns
tF
Output Fall Time
0.8
V/ns
tSK(0)
Output Skew: Skew between outputs of the same package (in phase).
See Figure 11
0.2
ns
tSK(p)
Pulse Skew: Skew between opposite transitions of the same output (tPHL
– tPLH).
See Figure 10
0.2
ns
tSK(t)
Package Skew: Skew between outputs of different packages at the same
power supply voltage, temperature and package type.
See Figure 12
0.4
ns
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