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MCIMX31LVMN5C Datasheet(PDF) 5 Page - Freescale Semiconductor, Inc |
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MCIMX31LVMN5C Datasheet(HTML) 5 Page - Freescale Semiconductor, Inc |
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5 / 122 page  Functional Description and Application Information MCIMX31/MCIMX31L Technical Data, Rev. 4.1 Freescale Semiconductor 5 • Instruction and data memory management units (MMUs), managed using micro TLB structures backed by a unified main TLB • Instruction and data L1 caches, including a non-blocking data cache with Hit-Under-Miss • Virtually indexed/physically addressed L1 caches • 64-bit interface to both L1 caches • Write buffer (bypassable) • High-speed Advanced Micro Bus Architecture (AMBA)™ L2 interface • Vector Floating Point co-processor (VFP) for 3D graphics and other floating-point applications hardware acceleration • ETM™ and JTAG-based debug support 2.1.1 Memory System The ARM1136JF-S complex includes 16 KB Instruction and 16 KB Data L1 caches. It connects to the MCIMX31 L2 unified cache through 64-bit instruction (read-only), 64-bit data read/write (bi-directional), and 64-bit data write interfaces. The embedded 16K SRAM can be used for audio streaming data to avoid external memory accesses for the low-power audio playback, for security, or for other applications. There is also a 32-KB ROM for bootstrap code and other frequently-used code and data. A ROM patch module provides the ability to patch the internal ROM. It can also initiate an external boot by overriding the boot reset sequence by a jump to a configurable address. Table 2 shows information about the MCIMX31 core in tabular form. Table 2. MCIMX31 Core Core Acronym Core Name Brief Description Integrated Memory Includes ARM11 or ARM1136 ARM1136 Platform The ARM1136™ Platform consists of the ARM1136JF-S core, the ETM real-time debug modules, a 6 x 5 multi-layer AHB crossbar switch (MAX), and a Vector Floating Processor (VFP). The MCIMX31 provides a high-performance ARM11 microprocessor core and highly integrated system functions. The ARM Application Processor (AP) and other subsystems address the needs of the personal, wireless, and portable product market with integrated peripherals, advanced processor core, and power management capabilities. • 16 Kbyte Instruction Cache • 16 Kbyte Data Cache • 128 Kbyte L2 Cache • 32 Kbyte ROM • 16 Kbyte RAM |
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