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TS68230CFN10 Datasheet(PDF) 6 Page - STMicroelectronics |
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TS68230CFN10 Datasheet(HTML) 6 Page - STMicroelectronics |
6 / 61 page Figure 1.2 : Port Mode Layout (continued). 1.2. SIGNAL DESCRIPTION Throughout this data sheet, signals are presented u- sing the terms active and inactive or asserted and negated independent of whether the signal is active in the high-voltage state or low-voltage state. (The active state of each logic pin is given below). Active low signals are denoted by a superscript bar. R/W indicates a write is active low and a read active high. Table 1.2 further describes each pin and the logical pin assignments are given in figure 1.3. 1.2.1. BIDIRECTIONAL DATA BUS (D0-D7). The data bus pins D0-D7 form an 8-bit bidirectional data bus to/from an TS68000 bus master. These pins are active high. 1.2.2. REGISTER SELECTS (RS1-RS5). The regis- ter select pins, RS1-RS5, are active high high- impedance inputs that determine which of the 23 internal registers is being selected. They are provi- ded by the TS68000 bus master or other bus mas- ter. TS68230 6/61 |
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