Integrated Crystal and SRAM

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9

Pin Description

PIN

NAME

FUNCTION

1, 2,

7–14, 19

N.C.

No Connection. Not connected internally. Must be connected to ground.

3

32kHz

32kHz Push-Pull Output. If disabled with either EN32kHz = 0 or BB32kHz = 0, the state of the 32kHz pin

will be low.

4

DC Power Pin for Primary Power Supply. This pin should be decoupled using a 0.1μF to 1.0μF capacitor.

5

INT/SQW

Active-Low Interrupt or Square-Wave Output. This open-drain pin requires an external pullup resistor. It can

be left open if not used. This multifunction pin is determined by the state of the INTCN bit in the Control

Register (0Eh). When INTCN is set to logic 0, this pin outputs a square wave and its frequency is

determined by RS2 and RS1 bits. When INTCN is set to logic 1, then a match between the timekeeping

registers and either of the alarm registers activates the

INT/SQW pin (if the alarm is enabled). Because the

INTCN bit is set to logic 1 when power is first applied, the pin defaults to an interrupt output with alarms

be left floating.

6

RST

RST pin is driven high impedance. The active-low, open-drain output is combined with a debounced

pushbutton input function. This pin can be activated by a pushbutton reset request. It has an internal 50k

RST immediately goes high.

15

GND

Ground

16

Backup Power-Supply Input. This pin should be decoupled using a 0.1μF to 1.0μF low-leakage capacitor.

the battery can cause improper operation. UL recognized to ensure against reverse charging when used

with a lithium battery. Go to www.maxim-ic.com/qa/info/ul.

17

SDA

18, 20

SCL

movement on the serial interface. A connection to only one of the pins is required. The other pin must be

connected to the same signal or be left floating. Up to 5.5V can be used for this pin, regardless of the

power failures and to automatically switch to the back-

up supply when necessary. The RST pin provides an

external pushbutton function and acts as an indicator of

a power-fail event. Also available are 236 bytes of gen-

eral-purpose battery-backed SRAM.

Operation

The block diagram shows the main elements of the

DS3232. The eight blocks can be grouped into four

functional groups: TCXO, power control, pushbutton

function, and RTC. Their operations are described sep-

arately in the following sections.

32kHz TCXO

The temperature sensor, oscillator, and control logic

form the TCXO. The controller reads the output of the

on-chip temperature sensor and uses a lookup table to

determine the capacitance required, adds the aging

correction in AGE register, and then sets the capaci-

tance selection registers. New values, including

changes to the AGE register, are loaded only when a

change in the temperature value occurs. The tempera-

64 seconds (default, see the description for CRATE1

and CRATE0 in the control/status register) afterwards.