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TS652D Datasheet(PDF) 4 Page - STMicroelectronics |
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TS652D Datasheet(HTML) 4 Page - STMicroelectronics |
4 / 9 page TS652 4/9 DIGITAL INPUTS SIMPLIFIED SCHEMATIC The TS652 consists of two independent channels. Each channel has two stages. The first is a very low noise digitally controlled variable gain amplifier (range 0 to 18dB). The TS652 features a high input impedance and a low noise current. To minimize the overall noise figure, the source impedance must be less than 3k Ω. This value gives an equal contribution of voltage and current noises. The second stage is a gain/attenuation stage (+12dB to -9dB) featuring a low output impedance. This output stage can drive loads as low as 500 Ω. POWER DOWN MODE POSITION Symbol Parameter Min. Typ. Max. Unit GC1, GC2, GC3 and GC4 Low Level 0 0.8 V High Level 2 3.3 + _ _ + + _ _ + v v GAIN CONTROL LOGIC DECODER Input1 + _ _ + v Input2 +Vcc2 Digital GND (DGND) Ouput2 Ouput1 +Vcc1 -Vcc Analog GND (AGND) GC2 GC1 GC3 GC4 v v v +Vcc -Vcc +Vcc -Vcc Power Down Input Output |
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