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5GDF64A-80M-60.000 Datasheet(PDF) 1 Page - EUROQUARTZ limited |
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5GDF64A-80M-60.000 Datasheet(HTML) 1 Page - EUROQUARTZ limited |
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1 / 1 page EURO QUARTZ EUROQUARTZ LIMITED Blacknell Lane CREWKERNE Somerset UK TA18 7HE Tel: +44 (0)1460 230000 Fax: +44 (0)1460 230001 Email: info@euroquartz.co.uk www.euroquartz.co.uk VCXO 11.4 x 9.6 x 4.7mm SMD VCXO GDF64 LVDS OUTLINE & DIMENSIONS PART NUMBERING Example: 3GDF64GB-80N-60.000 Supply Voltage 3 = +3.3V Series Designator GDF64 RoHS Status G = Compliant Blank - Non-compliant Stability over temperature range (See table) Pullability in ±ppm Pullability determinator N = minimum M = maximum T = Typical Frequency in MHz Frequency range 38MHz to 640MHz LVDS Output Supply Voltage 3.3 VDC Phase jitter 0.4ps typical Pull range from ±30ppm to ±150ppm Stability Code FREQUENCY STABILITY A 25 0°~+70°C B 50 0°~+70°C C 100 0°~+70°C D 25 -40°~+85°C E 50 -40°~+85°C F 100 -40°~+85°C If non-standard frequency stability is required Use ‘I’ followed by stability, i.e. I20 for ±20ppm Stability ±ppm Temp. Range DESCRIPTION Frequency Range: 38.0MHz to 640.0MHz Supply Voltage: 3.3 VDC ±5% Output Logic: LVDS RMS Period Jitter: 3.0ps typical Peak to Peak Jitter: 20.0ps typical, 30.0ps maximum Phase Jitter: 0.4ps typical, 5.0ps maximum Initial Frequency Accuracy: Tune to the nominal frequency with Vc= 1.65 ±0.2VDC Output Voltage HIGH (1): 1.4 Volts typical Output Voltage LOW (0): 1.1 Volts typical Pulling Range: From ±30ppm to ±150ppm Control Voltage Range: 1.65 ±1.35 Volts Temperature Stability: See table Output Load: 50 into Vdd or Thevenin equiv. Rise/Fall Times: 0.5ns typ., 0.7ns max. 20% Vdd to 80% Vdd Duty Cycle: 50% ±5% (Measured at Vdd-1.3V) Start-up Time: 10ms maximum, 5ms typical Current Consumption: 55mA typical, 60mA maximum (At 202.50MHz) Static Discharge Protection: 2kV maximum Storage Temperature: -55° to +150°C Ageing: ±2ppm per year maximum Enable/Disable: See table RoHS Status: Fully compliant or non compliant SPECIFICATION GDF64 VCXOs are packaged in a 6 pad 11.4 x 9.6m SMD package. Typical phase jitter for GDF series VCXOs is 0.4 ps. Output is LVDS. Applications include phase lock loop, SONET/ATM, set-top boxes, MPEG , audio/video modulation, video game consoles and HDTV. Tristate Pad Status ENABLE/DISABLE FUNCTION LVDS and Complimentary LVDS enabled Both outputs are disabled (high impedance) Both outputs are enabled Output Status Not connected Below 0.3Vdd (Ref. to ground) Above 0.7Vdd (Ref. to ground) |
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