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ADUM3210BRZ-RL7 Datasheet(PDF) 4 Page - Analog Devices |
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ADUM3210BRZ-RL7 Datasheet(HTML) 4 Page - Analog Devices |
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4 / 20 page  ADuM3210 Rev. A | Page 4 of 20 ELECTRICAL CHARACTERISTICS—3 V, 105°C OPERATION All voltages are relative to their respective ground. 2.7 V ≤ VDD1 ≤ 3.6 V, 2.7 V ≤ VDD2 ≤ 3.6 V. All minimum/maximum specifications apply over the entire recommended operating range, unless otherwise noted. All typical specifications are at TA = 25°C, VDD1 = VDD2 = 3.0 V. Table 2. Parameter Symbol Min Typ Max Unit Test Conditions DC SPECIFICATIONS Input Supply Current, per Channel, Quiescent IDDI (Q) 0.3 0.5 mA Output Supply Current, per Channel, Quiescent IDDO (Q) 0.3 0.5 mA ADuM3210BR, Total Supply Current, Two Channels1 DC to 2 Mbps VDD1 Supply Current IDD1 (Q) 0.8 1.3 mA DC to 1 MHz logic signal freq. VDD2 Supply Current IDD2 (Q) 0.7 1.0 mA DC to 1 MHz logic signal freq. 10 Mbps VDD1 Supply Current IDD1 (10) 2.0 3.2 mA 5 MHz logic signal freq. VDD2 Supply Current IDD2 (10) 1.1 1.7 mA 5 MHz logic signal freq. Input Currents IIA, IIB −10 +0.01 +10 μA 0 ≤ VIA, VIB, ≤ VDD1 or VDD2 Logic High Input Threshold VIH 0.7 × (VDD1 or VDD2) V Logic Low Input Threshold VIL 0.3 × (VDD1 or VDD2) V Logic High Output Voltages VOAH (VDD1 or VDD2) − 0.1 3.0 V IOx = −20 μA, VIx = VIxH VOBH (VDD1 or VDD2) − 0.5 2.8 V IOx = −4 mA, VIx = VIxH Logic Low Output Voltages VOAL 0.0 0.1 V IOx = 20 μA, VIx = VIxL VOBL 0.04 0.1 V IOx = 400 μA, VIx = VIxL 0.2 0.4 V IOx = 4 mA, VIx = VIxL SWITCHING SPECIFICATIONS Minimum Pulse Width2 PW 100 ns CL = 15 pF, CMOS signal levels Maximum Data Rate3 10 Mbps CL = 15 pF, CMOS signal levels Propagation Delay4 tPHL, tPLH 20 60 ns CL = 15 pF, CMOS signal levels Pulse Width Distortion, |tPLH − tPHL|4 PWD 3 ns CL = 15 pF, CMOS signal levels Change vs. Temperature 5 ps/°C CL = 15 pF, CMOS signal levels Propagation Delay Skew5 tPSK 22 ns CL = 15 pF, CMOS signal levels Channel-to-Channel Matching6 tPSKCD 3 ns CL = 15 pF, CMOS signal levels Output Rise/Fall Time (10% to 90%) tR/tF 3.0 ns CL = 15 pF, CMOS signal levels Common-Mode Transient Immunity at Logic High Output7 |CMH| 25 35 kV/μs VIx = VDD1, VDD2, VCM = 1000 V, transient magnitude = 800 V Common-Mode Transient Immunity at Logic Low Output7 |CML| 25 35 kV/μs VIx = 0 V, VCM = 1000 V, transient magnitude = 800 V Refresh Rate fr 1.1 Mbps Input Dynamic Supply Current, per Channel8 IDDI (D) 0.10 mA/Mbps Output Dynamic Supply Current, per Channel8 IDDO (D) 0.03 mA/Mbps 1 The supply current values for both channels are combined when running at identical data rates. Output supply current values are specified with no output load present. The supply current associated with an individual channel operating at a given data rate can be calculated as described in the section. See through for information on per-channel supply current as a function of data rate for unloaded and loaded conditions. See and for total VDD1 and VDD2 supply currents as a function of data rate. Power Consumption Power Consumption Figure 4 Figure 4 Figure 6 Figure 6 Figure 7 Figure 8 2 The minimum pulse width is the shortest pulse width at which the specified pulse width distortion is guaranteed. 3 The maximum data rate is the fastest data rate at which the specified pulse width distortion is guaranteed. 4 tPHL propagation delay is measured from the 50% level of the falling edge of the VIx signal to the 50% level of the falling edge of the VOx signal. tPLH propagation delay is measured from the 50% level of the rising edge of the VIx signal to the 50% level of the rising edge of the VOx signal. 5 tPSK is the magnitude of the worst-case difference in tPHL and/or tPLH that is measured between units at the same operating temperature, supply voltages, and output load within the recommended operating conditions. 6 Channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of the isolation barrier. Opposing directional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on opposing sides of the isolation barrier. 7 CMH is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDD2. CML is the maximum common-mode voltage slew rate that can be sustained while maintaining VO < 0.8 V. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. The transient magnitude is the range over which the common mode is slewed. 8 Dynamic supply current is the incremental amount of supply current required for a 1 Mbps increase in the signal data rate. See through for information on per-channel supply current for unloaded and loaded conditions. See the section for guidance on calculating per-channel supply current for a given data rate. |
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