CLOCK GENERATOR

MOTOROLA

MC33591 Technical Data

9

CLOCK GENERATOR

Typical crystal frequencies are:

- 9.864375MHz for 315MHz band,

- 13.580625MHz for 434MHz band.

Figure 11: Clock generation diagram

SERIAL INTERFACE

ROMEO2 and the microcontroller communicate through a Serial Peripheral Interface (SPI). It enables:

- the microcontroller to set and check ROMEO2 configuration,

- ROMEO2 to send the received data.

If the SPI is not used, a Power On Reset (POR) sets ROMEO2 to operate correctly in a default configuration.

The interface is operated by the 3 following input/output pins:

- Serial Clock SCLK,

- Master Output Slave Input MOSI,

- Master Input Slave Output MISO.

The master clock is used to synchronise data movement both in and out of the device through its MOSI and

MISO lines. The master and slave devices are capable of exchanging a byte of information during a sequence of

eight clock cycles. Since SCLK is generated by the master device, this line is an input on a slave device.

The MISO line is configured as an input in a master device and as an output in a slave device. The MOSI line is

configured as an output in a master device and as an input in a slave device. The MISO and MOSI lines transfer

serial data in one direction with the most significant bit sent first. Data are captured on falling edges of SCLK.

Data are shifted out on rising edge of SCLK. When no data are output, SCLK and MOSI force a low level. Using

Motorola acronyms, this means that the clock phase and polarity control bits of the microcontroller SPI have to be

CPOL= 0 and CPHA=1.

In configuration mode, as long as a low level is applied on RESETB (see state machine on figure 14 page 13),

the microcontroller is the master node providing clock information on SCLK input, control and configuration bits

on the MOSI line. If the default configuration is not the desired one, the microcontroller (MCU) can change it by

writing into the configuration registers. The configuration registers can also be read back to check their contents.

Configuration registers cannot be addressed separately, the whole configuration has to be sent as a 3x8

bitstream. The contents are written out as a 24-bit serial data stream. Transmissions which are not multiple of 24

¸ 8

Phase Frequency Detector

XTAL

Reference

¸ 32

¸ 11

IF Filter Reference Clock

& Clock Recovery

434MHz band

315MHz band

UHF Oscillator

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com