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DSPB56724CAG Datasheet(PDF) 9 Page - Freescale Semiconductor, Inc |
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DSPB56724CAG Datasheet(HTML) 9 Page - Freescale Semiconductor, Inc |
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9 / 48 page  Symphony™ DSP56724/ DSP56725 Multi-Core Audio Processors, Rev. 1 Freescale Semiconductor 9 1.1.7 External Clock Operation The DSP56724/DSP56725 system clock is derived from the on-chip oscillator or is externally supplied. To use the on-chip oscillator, connect a crystal and associated resistor/capacitor components to EXTAL and XTAL; see Figure 6. Figure 6. Using the On-Chip Oscillator If the DSP56724/DSP56725 system clock is an externally supplied square wave voltage source, it is connected to EXTAL (Figure 7). When the external square wave source is connected to EXTAL, the XTAL pin is not used. Figure 7. External Clock Timing 3 PLL VCO Frequency Fvco 200 — 500 MHz Fvco = (Fin * NF)/NR 4 Output Clock Frequency [1] [2] • with PLL enabled • with PLL disabled Fout 25 — — 200 or 250 200 or 250 MHz Fout = Fvco/NO Fout = Fin 5 System Clock Frequency • with PLL enabled[2] • with PLL disabled Fsys 0.195 0 — 200 or 250 200 MHz Fsys = Fout/2DF Fsys = Fout Note: 1. Fin = External frequency NF = Multiplication Factor NR = Predivision Factor NO = Output Divider DF = Division Factor 2. Maximum frequency of 200 MHz supported at 0.95 V < VVDD_CORE < 1.05 V and –40 < Tj < 100° C Maximum frequency of 250 MHz supported at 1.14 V < VVDD_CORE < 1.26 V and 0 < Tj < 90° C Table 5. Internal Clocks (Continued) No. Characteristics Symbol Min Typ Max Unit Condition Suggested component values: fosc = 24.576 MHz R = 1 M ±10% C (EXTAL)= 18 pF Calculations are for a 5–30 MHz crystal with the following parameters: • shunt capacitance (C0) of 10 pq–F12 pF • series resistance 40 Ohm C (XTAL) = 18 pF • drive level of 10 μW XTAL EXTAL R XTAL1 C C EXTAL VIL VIH Midpoint Note: The midpoint is 0.5 (VIH + VIL). Eth Etl Etc 7 8 6 |
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