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LTC2305IMS-TRPBF Datasheet(PDF) 10 Page - Linear Technology |
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LTC2305IMS-TRPBF Datasheet(HTML) 10 Page - Linear Technology |
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10 / 24 page  LTC2301/LTC2305 10 23015f PIN FUNCTIONS GND (Pins 1, 4, 9): Ground. All GND pins must be con- nected to a solid ground plane. SDA (Pin 2): Bidirectional Serial Data Line of the I2C In- terface. In transmitter mode (Read), the conversion result is output at the SDA pin, while in receiver mode (Write), the DIN word is input at the SDA pin to configure the ADC. The pin is high impedance during the data input mode and is an open drain output (requires an appropriate pull-up device to VDD) during the data output mode. SCL (Pin 3): Serial Clock Pin of the I2C Interface. The LTC2305 can only act as a slave and the SCL pin only ac- cepts an external serial clock. Data is shifted into the SDA pin on the rising edges of the SCL clock and output through the SDA pin on the falling edges of the SCL clock. CH0-CH1 (Pins 5, 6): Channel 0 and Channel 1 Analog Inputs. CH0 and CH1 can be configured as single-ended or differential input channels. See the Analog Input Multi- plexer section. VREF (Pin 7): 2.5V Reference Output. Bypass to GND with a minimum 2.2μF tantalum capacitor or low ESR ceramic capacitor. The internal reference may be overdriven by an external 2.5V reference at this pin. REFCOMP (Pin 8): Reference Buffer Output. Bypass to GND with a 10μF low ESR ceramic or tantalum and 0.1μF ceramic capacitor in parallel. Nominal output voltage is 4.096V. The internal reference buffer driving this pin is disabled by grounding VREF, allowing REFCOMP to be overdriven by an external source (see Figure 5c). VDD (Pin 10): 5V Analog Supply. The range of VDD is 4.75V to 5.25V. Bypass VDD to GND with a 0.1μF ceramic and a 10μF low ESR ceramic or tantalum capacitor in parallel. AD1 (Pin 11): Chip Address Control Pin. This pin is con- figured as a three-state (LOW, HIGH, Floating) address control bit for the device I2C address. See Table 2 for address selection. AD0 (Pin 12): Chip Address Control Pin. This pin is con- figured as a three-state (LOW, HIGH, Floating) address control bit for the device I2C address. See Table 2 for address selection. GND (Pin 13 – DFN Package Only): Exposed Pad Ground. Must be soldered directly to ground plane. (LTC2305) |
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