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APL5336KI-TRG Datasheet(PDF) 11 Page - Anpec Electronics Coropration |
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APL5336KI-TRG Datasheet(HTML) 11 Page - Anpec Electronics Coropration |
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11 / 18 page  Copyright © ANPEC Electronics Corp. Rev. A.2 - Apr., 2008 APL5336 www.anpec.com.tw 11 Typical Application Circuit The ceramic capacitor C5 ( at least 8 µF) is necessary for output stability. Function Description Power-On-Reset A Power-On-Reset (POR) circuit monitors both input volt- ages at VCNTL and VIN pins to prevent wrong logic controls. The POR function initiates a soft-start process after both of the supply voltages exceed their rising POR voltage thresholds during powering on. Output Voltage Regulation The output voltage on VOUT pin is regulated to track the reference voltage applied on VREF pin. Two internal N- channel power MOSFETs controlled by high bandwidth error amplifiers regulate the output voltage by sourcing current from VIN pin or sinking current to GND pin. An internal output voltage sense pad is bonded to the VOUT pin with a bonding wire for perfect load regulation. For preventing the two power MOSFETs from shoot- through, a small voltage offset between the positive in- puts of the two error amplifiers is designed. It results in higher output voltage while the regulator sinks light or heavy load current. The APL5336 provides very fast load transient response at small output capacitance to save total cost. Current-Limit The APL5336 monitors the output current, both sourcing and sinking current, and limits the maximum output cur- rent to prevent damages during current overload or short- circuit (shorted from VOUT to GND or VIN) conditions. Enable The VREF pin is a multi-function input pin which is the reference voltage input pin and the enable control input pin. Applying and holding the voltage (V REF) on VREF be- Internal and External Soft-Start The APL5336 is designed with an internal soft-start func- tion to control the rise rate of the output voltage to prevent inrush current during start-up. When release the pull-low transistor connected with VREF pin, the current via the resistor divider charges the exter- nal soft-start capacitor (C4) and the V REF starts to rise up. The IC starts a soft-start process when the V REF reaches the enable voltage threshold. The output voltage is regu- lated to follow the lower voltage, which is either the inter- nal soft-start voltage ramp or the VREF voltage, to rise up. The external soft-start interval is programmable by the resistor-divider and the soft-start capacitor (C4). Thermal Shutdown The thermal shutdown circuit limits the junction tempera- ture of the APL5336. When the junction temperature ex- ceeds 150 o C, a thermal sensor turns off the both pass transistors, allowing the device to cool down. The ther- mal sensor allows the regulator to regulate again after the junction temperature cools by 40 o C, resulting in a pulsed output during continuous thermal overload conditions. The thermal limit is designed with a 40 o C hysteresis to lower the average TJ during continuous ther- mal overload conditions, increasing lifetime of the APL5336. low 0.3V (typical) shuts down the output of the regulator. In the typical application, an NPN transistor or N-channel MOSFET is used to pull down the V REF while applying a “high” signal to turn on the transistor. When shutdown function is active, both of the internal power MOSFETs are turned off and the impedance of the VOUT pin is larger than 10M Ω. V CNTL +5V V OUT 0.9V/0.75V C4 1 µF R1 100k Ω R2 100k Ω V IN +1.8V/+1.5V Q1 Shutdown C3 100 µF (optional) V REF GND VREF VIN VOUT VCNTL 1 2 3 4 6 C1 1 µF C5 10 µF Enable APL5336 C2 47 µF |
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