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TAS5103DAP Datasheet(PDF) 4 Page - Texas Instruments |
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TAS5103DAP Datasheet(HTML) 4 Page - Texas Instruments |
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4 / 25 page  TAS5102 TAS5103 SLLS801A – JUNE 2008 – REVISED JUNE 2008 .............................................................................................................................................................. www.ti.com Pin Functions PIN FUNCTION (1) DESCRIPTION NAME TAS5102 TAS5103 NO. NO AGND 3 14 P Analog ground BST_A 32 17 P HS bootstrap supply (BST). External capacitor to OUT_A required. BST_B 25 24 P HS bootstrap supply (BST). External capacitor to OUT_B required. BST_C 24 25 P HS bootstrap supply (BST). External capacitor to OUT_C required. BST_D 17 32 P HS bootstrap supply (BST). External capacitor to OUT_D required. FAULT 12 5 O Device error signal (shutdown); open drain GND 4 13 P Ground PGND_AB 29 20 P Power ground for half-bridges A and B PGND_AB 28 21 P Power ground for half-bridges A and B PGND_CD 21 28 P Power ground for half-bridges C and D PGND_CD 20 29 P Power ground for half-bridge D GVDD_AB 1 16 P Gate-drive voltage supply. Requires 1- µF capacitor to GND. GVDD_CD 16 1 P Gate-drive voltage supply. Requires 1- µF capacitor to GND. Mode selection 2, connect to either AGND or VREG, no pull-up or pull-down M2 15 2 I resistors Mode selection 1, connect to either AGND or VREG, no pull-up or pull-down M1 14 3 I resistors OC_ADJ 13 4 O Analog overcurrent programming. Requires resistor to ground. OTW 6 11 O Overtemperature warning signal, push-pull, active high OUT_A 30 19 O Output, half-bridge A OUT_B 27 22 O Output, half-bridge B OUT_C 22 27 O Output, half-bridge C OUT_D 19 30 O Output, half-bridge D Power supply input for half-bridge A. Requires close decoupling of 0.1- µF PVDD_A 31 18 P capacitor to GND_A. Power supply input for half-bridge B. Requires close decoupling of 0.1- µF PVDD_B 26 23 P capacitor to GND_B. Power supply input for half-bridge C. Requires close decoupling of 0.1- µF PVDD_C 23 26 P capacitor to GND_C. Power supply input for half-bridge D. Requires close decoupling of 0.1- µF PVDD_D 18 31 P capacitor to GND_D. PWM_A 8 9 I Input signal for half-bridge A PWM_B 9 8 I Input signal for half-bridge B PWM_C 10 7 I Input signal for half-bridge C PWM_D 11 6 I Input signal for half-bridge D RESET 7 10 I PWM is not active if RESET goes low. Controls start/stop time of PWM modulation. Requires 2.2 nF capacitor to GND SSTIMER 5 12 I for AD BTL. Leave pin floating (NC) for BD BTL mode. Also, leave pin floating (NC) for SE mode. VREG 2 15 P Digital regulator supply filter. Requires 0.1- µF capacitor to AGND. (1) I = input, O = output, P = power 4 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): TAS5102 TAS5103 |
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