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M37480M8-XXXSP Datasheet(PDF) 5 Page - Renesas Technology Corp |
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M37480M8-XXXSP Datasheet(HTML) 5 Page - Renesas Technology Corp |
5 / 337 page BEFORE USING THIS USER’S MANUAL 1. Manual Contents This user’s manual consists of the following three chapters. Refer to the chapter appropriate to your conditions, such as hardware design or software development. q CHAPTER 1 – HARDWARE This chapter describes the features of the microcomputers, the operation of their peripherals, and their electrical characteristics. q CHAPTER 2 – APPLICATIONS This chapter describes usage of peripheral functions and application examples of the microcomputers, focusing on the settings of the related registers. q CHAPTER 3 – APPENDICES This chapter describes all the control register configurations, and the mask ROM confirmation forms (mask ROM version), the ROM programming confirmation forms (one time PROM version), and the mark specification forms to be submitted at the ordering. 2. Register Configurations An example of control register configurations of the 7480 Group and 7481 Group and the description of symbols used in them are explained below. b5 b6 b7 b4 b3 b2 b1 b0 b Name Function At reset 1 2 3 4 5 6 7 0 0 0 Undefined 0 Undefined Fix these bits to ‘0’ Stack page selection bit (Note) 0 : Zero page 1 : 1 page Watchdog timer L count source selection bit 0 : f(XIN)/8 1 : f(XIN)/16 Clock division ratio selection bit 0 : f(XIN)/2 (high-speed mode) 1 : f(XIN)/8 (medium-speed mode) Not implemented. Writing to this bit is disabled. This bit is undefined at reading. Not implemented. Writing to this bit is disabled. This bit is undefined at reading. Note: In the products whose RAM size is 192 bytes or less, set this bit to ‘0’. 0 0 Not implemented. Writing to this bit is disabled. This bit is undefined at reading. Undefined RW O O 0 O Undefined Undefined Undefined × × × O0 OO OO 0 0 Notes 1: Contents after system is released from reset 0: ‘0’ after system is released from reset 1: ‘1’ after system is released from reset undefined: undefined after system is released from reset 2: Bit attributes R (Read) O: Read enabled ×: Read disabled Undefined: Undefined at reading 0: ‘0’ at reading 1: ‘1’ at reading O: Write enabled ×: Write disabled 0: Fixed to ‘0’ ∗: This bit can be set to ‘0’ by software, but cannot be set to ‘1’. W (Write) indicates the bit which is not implemented. Bit Bit attributes (Note 2) Contents immediately after system is released from reset (Note 1) CPU mode register (CPUM) [Address 00FB16] |
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