HD6417760BP200D datasheet(8/1345 Pages) RENESAS

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HD6417760BP200D Datasheet(PDF) 8 Page - Renesas Technology Corp

Part #	HD6417760BP200D

Description	SuperHTM RISC engine

Download	1345 Pages

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Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

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8 / 1345 page

Rev. 1.0, 02/03, page vi of xlviii

Contents

Section 1 Overview ........................................................................................... 1

1.1

Features ............................................................................................................................. 2

1.2

Block Diagram .................................................................................................................. 10

1.3

Pin Arrangement ............................................................................................................... 11

1.4

Pin Description.................................................................................................................. 12

1.5

Pin Function ...................................................................................................................... 21

Section 2 Programming Model.......................................................................... 29

2.1

Data Formats..................................................................................................................... 29

2.2

Register Descriptions ........................................................................................................ 30

2.2.1

Privileged Mode and Banks ................................................................................. 30

2.2.2

General Registers ................................................................................................. 33

2.2.3

Control Registers ................................................................................................. 34

2.2.4

System Registers.................................................................................................. 36

2.2.5

FPU Registers ...................................................................................................... 36

2.3

Memory-Mapped Registers............................................................................................... 36

2.4

Data Formats..................................................................................................................... 37

2.4.1

Data Format in Registers ..................................................................................... 37

2.4.2

Data Formats in Memory ..................................................................................... 37

2.5

Processing States............................................................................................................... 38

2.6

Processing Modes ............................................................................................................. 40

Section 3 Floating-Point Unit (FPU) ................................................................. 41

3.1

Features ............................................................................................................................. 41

3.2

Data Formats..................................................................................................................... 41

3.2.1

Floating-Point Format.......................................................................................... 41

3.2.2

Non-Numbers (NaN) ........................................................................................... 43

3.2.3

Denormalized Numbers ....................................................................................... 44

3.3

Register Descriptions ........................................................................................................ 45

3.3.1

Floating-Point Registers....................................................................................... 45

3.3.2

Floating-Point Status/Control Register (FPSCR)................................................. 47

3.3.3

Floating-Point Communication Register (FPUL) ................................................ 48

3.4

Rounding........................................................................................................................... 49

3.5

Floating-Point Exceptions................................................................................................. 49

3.5.1

General FPU Disable Exceptions and Slot FPU Disable Exceptions................... 49

3.5.2

FPU Exception Sources ....................................................................................... 49

3.5.3

FPU Exception Handling ..................................................................................... 50

3.6

Graphics Support Functions.............................................................................................. 52

3.6.1

Geometric Operation Instructions ........................................................................ 52

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