H8S2372R datasheet(10/1203 Pages) RENESAS

Part #	H8S2372R

Description	Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2300 Series

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Manufacturer	RENESAS [Renesas Technology Corp]

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10 / 1203 page

Rev. 6.00 Jul 19, 2006 page x of lxiv

Item

Page

Revision (See Manual for Details)

6.6.1 Setting DRAM

Space

Table 6.4 Relation

between Settings of

Bits RMTS2 to RMTS0

and DRAM Space

191

Note * amended

Note: * Reserved (setting prohibited) in the H8S/2378 Group.

9.2.7 DTC Enable

Registers A to H

(DTCERA to DTCERH)

430

Description of DTC Activation Enable amended

[Clearing conditions] ... These bits are not automatically cleared

when the DISEL bit is 0 and specified number of transfers have

not ended

• When 0 is written to DTCE after reading DTCE = 1

Section 10 I/O Ports

Table 10.1 Port

Functions

456 to

460

Table 10.1 amended

Mode 1*

3

Mode 2*

3

Note 1 amended

Note: 1. Not supported by the H8S/2378 0.18

µm F-ZTAT Group,

H8S/2377, H8S/2375, and H8S/2373.

10.1.4 Pin Functions

462

Title amended

10.2.4 Pin Functions

474

Title amended

10.3.6 Pin Functions

487

Mode 7 (EXPE = 0)

Note 3 amended

Note: 3. Not used in the H8S/2378 0.18

µm F-ZTAT Group,

H8S/2377, H8S/2375, and H8S/2373.

10.6.4 Pin Functions

496

Title amended

10.14.1 Port F Data

Direction Register

(PFDDR)

529

Subheading deleted

10.14.4 Pin Functions

533,

534

• PF2/

LCAS/IRQ15/DQML

• PF1/

UCAS/IRQ14/DQMU

Note 2 amended

Note: 2. Not used in the H8S/2378 0.18

µm F-ZTAT Group,

H8S/2377, H8S/2375, and H8S/2373.

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