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M32C83 Datasheet(PDF) 8 Page - Renesas Technology Corp |
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M32C83 Datasheet(HTML) 8 Page - Renesas Technology Corp |
8 / 527 page A-4 12.2 DMAC Transfer Cycles ......................................................................................... 123 12.3 Channel Priority and DMA Transfer Timing ....................................................... 123 13. DMAC II ___________________________________ 125 13.1 DMAC II Settings .................................................................................................. 125 13.1.1 RLVL Register................................................................................................ 125 13.1.2 DMAC II Index ................................................................................................ 127 13.1.3 Interrupt Control Register for the Peripheral Function ............................. 129 13.1.4 Relocatable Vector Table for the Peripheral Function .............................. 129 13.1.5 IRLT Bit in the IIOiIE Register (i=0 to 11)..................................................... 129 13.2 DMAC II Performance .......................................................................................... 129 13.3 Transfer Data ........................................................................................................ 129 13.3.1 Memory-to-Memory Transfer ....................................................................... 129 13.3.2 Immediate Data Transfer .............................................................................. 130 13.3.3 Calculation Transfer ..................................................................................... 130 13.4 Transfer Modes ..................................................................................................... 130 13.4.1 Single Transfer .............................................................................................. 130 13.4.2 Burst Transfer ............................................................................................... 130 13.4.3 Multiple Transfer ........................................................................................... 130 13.4.4 Chained Transfer ........................................................................................... 131 13.4.5 End-of-Transfer Interrupt ............................................................................. 131 13.5 Execution Time ..................................................................................................... 132 14. Timer _____________________________________ 133 14.1 Timer A .................................................................................................................. 135 14.1.1 Timer Mode .................................................................................................... 141 14.1.2 Event Counter Mode ..................................................................................... 143 14.1.3 One-shot Timer Mode ................................................................................... 147 14.1.4 Pulse Width Modulation Mode ..................................................................... 149 14.2 Timer B .................................................................................................................. 152 14.2.1 Timer Mode .................................................................................................... 155 14.2.2 Event Counter Mode ..................................................................................... 156 14.2.3 Pulse Period/Pulse Width Measurement Mode .......................................... 158 15. Three-Phase Motor Control Timer Functions ____ 161 16. Serial I/O __________________________________ 172 16.1 Clock Synchronous Serial I/O Mode .................................................................. 182 16.1.1 Selecting CLK Polarity ................................................................................. 186 16.1.2 Selecting LSB First or MSB First ................................................................. 186 16.1.3 Continuous Receive Mode ........................................................................... 187 16.1.4 Serial Data Logic Inverse ............................................................................. 187 |
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