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M5M5V216ART-70HI Datasheet(PDF) 8 Page - Renesas Technology Corp |
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M5M5V216ART-70HI Datasheet(HTML) 8 Page - Renesas Technology Corp |
8 / 9 page M5M5V216ATP,RT revision-03, 14.Jan.'03 2097152-BIT (131072-WORD BY 16-BIT) CMOS STATIC RAM MITSUBISHI LSIs 7 tsu (PD) trec (PD) ns ms 2.2V tsu (PD) 2.7V 2.7V 2.2V trec (PD) BC1 , BC2 Vcc - 0.2V Vcc V V 2.0 Vcc (PD) VI (S) Icc (PD) 2.0 BC1 ~ +40ºC -40 ~ +25ºC 8 1 0.3 1 3 - - 24 - - - - µA µA µA µA POWER DOWN CHARACTERISTICS (1) ELECTRICAL CHARACTERISTICS Symbol Parameter Test conditions Limits Min Typ Max Units Power down supply voltage Chip select input S Power down supply c urrent Vcc=3.0V (2) TIMING REQUIREMINTS Symbol Parameter Test conditions Limits Min Typ Max Units Power down set up time Power down recov ery t ime (3) TIMING DIAGRAM BC control mode 2.2V tsu (PD) 2.7V 2.7V 2.2V trec (PD) Vcc S S control mode VI (BC) Byte control input BC1 & BC2 V 2.0 > = BC2 S Vcc - 0.2V > = 0 5 ~ +70ºC ~ +85ºC 2) BC1 and BC2 Vcc - 0.2V S 0.2V, other inputs=0~Vcc < = > = 1) S Vcc - 0.2V other inputs=0~Vcc > = Note 7: Typical parameter of Icc(PD) indicates the value for the center of distribution at 3.0V, and not 100% tested. Note8: On the BC# control mode, the lev el of S# must be f ixed at S# > Vcc-0.2V or S# < 0.2V. |
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