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H7N1002LMTL-E Datasheet(PDF) 5 Page - Renesas Technology Corp |
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H7N1002LMTL-E Datasheet(HTML) 5 Page - Renesas Technology Corp |
5 / 9 page H7N1002LD, H7N1002LS, H7N1002LM Rev.7.00 Apr 07, 2006 page 5 of 8 Avalanche Test Circuit Avalanche Waveform 0 ID VDS IAP V(BR)DSS VDD EAR = • L • IAP 2 • 2 1 VDSS VDSS – VDD D.U.T Rg IAP Monitor VDS Monitor VDD 50 Ω Vin 15 V L Source to Drain Voltage VSD (V) Reverse Drain Current vs. Source to Drain Voltage Channel Temperature Tch (°C) Maximum Avalanche Energy vs. Channel Temperature Derating 200 25 50 75 100 125 150 0 40 80 120 160 IAP = 50 A VDD = 25 V duty < 0.1 % Rg ≥ 50 Ω 0 0 20 40 60 80 0.4 0.8 1.2 1.6 2.0 VGS = 0, –5 V 10 V 100 Pulse Test 5 V Pulse Width PW (S) Normalized Transient Thermal Impedance vs. Pulse Width 3 1 0.3 0.1 0.03 0.01 10 µ 100 µ 1 m 10 m 100 m 1 10 Tc = 25°C D = 1 0.5 0.2 0.1 0.05 0.01 PDM PW T D = PW T θch – c (t) = γ s (t) • θch – c θch – c = 1.25°C/W, Tc = 25°C 0.02 1sho t pulse |
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