Rev.2.00, Oct.23.2003, page 1 of 1

HD74LV2GT241A

Dual Bus Buffer Noninverted with 3–state Output /

CMOS Logic Level Shifter

REJ03D0152–0200Z

(Previous ADE-205-679A (Z))

Rev.2.00

Oct.23.2003

Description

The HD74LV2GT241A has dual bus buffer noninverted with 3–state output in an 8 pin package. Two

noninverters are included in one circuit. Each circuit can be independently controlled by the enable signal

OE or OE, which enables outputs when receiving a low or high-level signal, respectively. The input

protection circuitry on this device allows over voltage tolerance on the input, allowing the device to be used

as a logic–level translator from 3.0 V CMOS Logic to 5.0 V CMOS Logic or from 1.8 V CMOS logic to

3.0 V CMOS Logic while operating at the high-voltage power supply. Low voltage and high-speed

operation is suitable for the battery powered products (e.g., notebook computers), and the low power

consumption extends the battery life.

Features

• The basic gate function is lined up as Renesas uni logic series.

• Supplied on emboss taping for high-speed automatic mounting.

• TTL compatible input level.

Supply voltage range : 3.0 to 5.5 V

Operating temperature range : –40 to +85°C

• Logic-level translate function

3.0 V CMOS logic

→ 5.0 V CMOS logic (@V

1.8 V or 2.5 V CMOS logic

→ 3.3 V CMOS logic (@V

• All inputs V

• Output current ±6 mA (@V

• All the logical input has hysteresis voltage for the slow transition.

• Ordering Information

Part Name

Package Type

Package Code

Package

Abbreviation

Taping Abbreviation

(Quantity)

HD74LV2GT241AUSE

SSOP-8 pin

TTP-8DBV

US

E (3,000 pcs/reel)