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M3021E8MC-AXXXFP Datasheet(PDF) 7 Page - Renesas Technology Corp |
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M3021E8MC-AXXXFP Datasheet(HTML) 7 Page - Renesas Technology Corp |
7 / 179 page Mitsubishi microcomputers M30218 Group SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER Pin Description 6 Pin Description VCC, VSS CNVSS XIN XOUT AVCC AVSS VEE P00/FLD16 to P07/FLD23 P10/FLD24 to P17/FLD31 P20/FLD32 to P27/FLD39 P30/FLD40 to P37/FLD47 P40/FLD48 to P47/FLD56 Signal name Power supply input CNVSS Reset input Clock input Clock output Analog power supply input pull-down power source Output port P0 Output port P1 Output port P2 I/O port P3 I/O port P4 Supply 2.7V(Note1) to 5.5 V to the VCC pin. Supply 0 V to the VSS pin. Connect a bypass capacitor across the VCC pin and VSS pin. Function Connect it to the VSS pin. A “L” on this input resets the microcomputer. These pins are provided for the main clock generating circuit.Connect a ceramic resonator or crystal between the XIN and the XOUT pins. To use an externally derived clock, input it to the XIN pin and leave the XOUT pin open. This pin is a power supply input for the A-D converter. Connect this pin to VCC. This pin is a power supply input for the A-D converter. Connect this pin to VSS. This is an 8-bit CMOS output port and high-breakdown-voltage P- channel open-drain output structure. A pull-down resistor is built in between port P0 and VEE pin. At reset, this port is set to VEE level. P0 function as FLD controller output pins as selected by software. This is an 8-bit output port equivalent to P0. Pins in this port also function as FLD controller output pins as selected by software. This is an 8-bit output port equivalent to P0. A pull-down resistor is not built in between P2 and VEE pin. Pins in this port also function as FLD controller output pins as selected by software. This is an 8-bit I/O port. A pull-down resistor is not built in between P3 and VEE pin. It has an input/output port direction register that allows the user to set each pin for input or output. This is low-voltage input level, and high-breakdown-voltage P-channel open-drain output structure. Pins in this port also function as FLD controller output pins as selected by software. This is an 8-bit I/O port equivalent to P3. This is low-voltage input level. P40 to P43 is high-breakdown-voltage P-channel open-drain output structure, P44 to P47 is CMOS output. A pull-down resistor is not built in between P4(P40 to P43) and VEE pin. Pins in this port also function as FLD controller output pins as selected by software. P44 to P47 also function as UART0 I/O pins as selected by software. When set for input, the user can specify in units of four bits by software whether or not they are tied to a pull-up resistor. Pin name Input Input Input Output Output Output Output I/O type Analog power supply input Input/output Input/output RESET VREF This pin is a reference voltage input for the A-D converter. Input Reference voltage input Apply voltage supplied to pull-down resistors of ports P0 to P1,P5,P6. P50/FLD8 to P57/FLD15 Output port P5 This is an 8-bit output port equivalent to P0. Pins in this port also function as FLD controller output pins as selected by software. Output P60/FLD0 to P67/FLD7 Output port P6 This is an 8-bit output port equivalent to P0. Pins in this port also function as FLD controller output pins as selected by software. Output |
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