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M37545GCGP Datasheet(PDF) 7 Page - Renesas Technology Corp |
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M37545GCGP Datasheet(HTML) 7 Page - Renesas Technology Corp |
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7 / 62 page  Rev.1.06 Mar 07, 2008 Page 7 of 59 REJ03B0140-0106 7545 Group PIN DESCRIPTION Table 3 Pin description Pin Name Function Function expect a port function VCC, VSS Power source • Apply voltage of 1.8 to 3.6V to VCC, and 0 V to VSS. VDDR Power source • Power source pin only for RAM2. When this pin is used, connect an approximately 0.1 µF bypass capacitor across the VSS line and the VDDR line. When not used, connect it to VSS. CNVSS CNVSS • Chip operating mode control pin, which is always connected to Vss. RESET Reset I/O • An N-channel open-drain I/O pin for a system reset. This pin has a pull-up transistor. When the watchdog timer, the built-in power-on reset or the voltage drop detection circuit causes the system to be reset, the RESET pin outputs "L" level. XIN Clock input • Input and output pins for main clock generating circuit • Connect a ceramic resonator or quartz-crystal oscillator between the XIN and XOUT pins. XOUT Clock output P00/KEY0 − P07/KEY7 I/O port P0 • 8-bit I/O port. • I/O direction register allows each pin to be individually programmed as either input or output. • CMOS compatible input level • CMOS 3-state output structure • Whether the pull-up function/key-on wakeup function is to be used or not can be determined by program. • Key-input (key-on wake up interrupt input) pins P10, P11 I/O port P1 • 2-bit I/O port having almost the same function as P0. • CMOS compatible input level • The output structure can be switched to N-channel open-drain or CMOS by software. Note: RLSS-only pins P20(LED0)/INT0 P21(LED1)/INT1 P22(LED2) − P27(LED7) I/O port P2 • 8-bit I/O port having almost the same function as P0. • CMOS compatible input level • The output structure can be switched to N-channel open-drain or CMOS by software. • P2 can output a large current for driving LED. • Interrupt input pins P30 −P37 I/O port P3 • 8-bit I/O port • I/O direction register allows each pin to be individually programmed as either input or output. • CMOS compatible input level • The output structure can be switched to N-channel open-drain or CMOS by software. P40(LED8), P41(LED9) I/O port P4 • 2-bit I/O port having almost the same function as P0. • CMOS compatible input level • CMOS 3-state output structure Note: RLSS-only pins P42/CARR • 1-bit I/O port • CMOS compatible input level • CMOS 3-state output structure • Carrier wave output pin for remote- control transmit |
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