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4583 Datasheet(PDF) 37 Page - Renesas Technology Corp |
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4583 Datasheet(HTML) 37 Page - Renesas Technology Corp |
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37 / 153 page  Rev.3.00 Aug 06, 2004 page 37 of 151 REJ03B0009-0300Z 4583 Group PRELIMINARY Notice: This is not a final specification. Some parametric limits are subject to change. LA 0 ; (✕0✕✕2) TV1A ; The SNZT1 instruction is valid ........ ➀ LA 0 ; (✕0✕✕2) TW5A ; Period measurement circuit stop NOP ........................................................... ➁ SNZT1 ; The SNZT1 instruction is executed (T1F flag cleared) NOP ........................................................... ➂ ✕ : these bits are not used here. Fig. 27 Period measurement circuit program example (7) Period measurement function (Timer 1, period measurement circuit) Timer 1 has the period measurement circuit which performs timer count operation synchronizing with the one cycle of the signal di- vided by 16 of an on-chip oscillator, D6/CNTR0 pin input, or P30/ INT0 pin input (one cycle, “H”, or “L” pulse width at the case of a P30/INT0 pin input). When the target signal for period measurement is set by bits 0 and 1 of register W5, a period measurement circuit is started by setting the bit 2 of register W5 to “1”. Then, if a XIN input is set as the count source of a timer 1 and the bit 2 of register W1 is set to “1”, timer 1 starts operation. Timer 1 starts operation synchronizing with the falling edge of the target signal for period measurement, and stops count operation synchronizing with the next falling edge (one-period generation circuit). When selecting D6/CNTR0 pin input as target signal for period measurement, the period measurement synchronous edge can be changed into a rising edge by setting the bit 2 of register W6 to “1”. When selecting P30/INT0 pin input as target signal for period measurement, period measurement synchronous edge can be changed into a rising edge by setting the bit 2 of register I1 to “1”. A timer 1 interrupt request flag (T1F) is set to “1” after completing measurement operation. When a period measurement circuit is set to be operating, timer 1 interrupt request flag (T1F) is not set by timer 1 underflow sig- nal, but turns into a flag which detects the completion of period measurement. In addition, a timer 1 underflow signal can be used as timer 2 count source. Once period measurement operation is completed, even if period measurement valid edge is input next, timer 1 is in a stop state and measurement data is held. When a period measurement circuit is used again, stop a period measurement circuit at once by setting the bit 2 of register W5 to “0”, and change a period measurement circuit into a state of op- eration by setting the bit 2 of register W5 to “1” again. When a period measurement circuit is used, clear bit 0 of regis- ter I1 to “0”, and set a timer 1 count start synchronous circuit to be “not selected”. Start timer operation immediately after operation of a period measurement circuit is started. When the target edge for measurement is input until timer opera- tion is started from the operation of period measurement circuit is started, the count operation is not executed until the timer opera- tion becomes valid. Accordingly, be careful of count data. When data is read from timer, stop the timer and clear bit 2 of register W5 to “0” to stop the period measurement circuit, and then execute the data read instruction. Depending on the state of timer 1, the timer 1 interrupt request flag (T1F) may be set to “1” when the period measurement cir- cuit is stopped by clearing bit 2 of register W5 to “0”. In order to avoid the occurrence of an unexpected interrupt, clear the bit 2 of register V1 to “0” (refer to Figure 27➀) and then, stop the bit 2 of register W5 to “0” to stop the period measurement circuit. In addition, execute the SNZT1 instruction to clear the T1F flag after executing at least one instruction (refer to Figure 27➁). Also, set the NOP instruction for the case when a skip is per- formed with the SNZT1 instruction (refer to Figure 27➂). When a period measurement circuit is used, select the suffi- ciently higher-speed frequency than the signal for measurement for the count source of a timer 1. When the target signal for period measurement is D6/CNTR0 pin input, do not select D6/CNTR0 pin input as timer 1 count source. (The XIN input is recommended as timer 1 count source at the time of period measurement circuit use.) (8) Pulse width measurement function (timer 1, period measurement circuit) A period measurement circuit can measure “H” pulse width (from rising to falling) or “L” pulse width (from falling to rising) of P30/ INT0 pin input (pulse width measurement function) when the fol- lowing is set; • Set the bit 0 of register W5 to “0”, and set a bit 1 to “1” (target for period measurement circuit: 30/INT0 pin input). • Set the bit 1 of register I1 to “1” (INT0 pin edge detection circuit: both edges detection) The measurement pulse width (“H” or “L”) is decided by the pe- riod measurement circuit and the P30/INT0 pin input level at the start time of timer operation. At the time of the start of a period measurement circuit and timer operation, “L” pulse width (from falling to rising) when the input level of P30/INT0 pin is “H” or “H” pulse width (from rising to fall- ing) when its level is “L” is measured. When the input of P30/INT0 pin is selected as the target for mea- surement, set the bit 3 of register I1 to “1”, and set the input of INT0 pin to be enabled. |
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